)]}' { "log": [ { "commit": "36f7ed8b9ce39c73444616c1dcee3ae734b138fb", "tree": "b1e6ef531e01b998ca8bc19820a6b26736d8ae48", "parents": [ "156a9c8ede47c880b218af447ce6b950a2646407", "d9d13418e9a291a43ebdeb5646d57b163d4155a0" ], "author": { "name": "Leon Romanovsky", "email": "leon@kernel.org", "time": "Thu Sep 10 11:29:28 2026 +0300" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 11:29:28 2026 +0300" }, "message": "Merge pull request #1800 from michich/FSF-address-in-GPLv2\n\nCOPYING.GPL2: update FSF address" }, { "commit": "156a9c8ede47c880b218af447ce6b950a2646407", "tree": "f95277954b228ed5fb29156467a0d02c47d29ea5", "parents": [ "e84c099f943aa186dab852435fd81288d94c66d5", "136666a396a81f65c9a7ff8764fc37dc41bb64ec" ], "author": { "name": "Leon Romanovsky", "email": "leon@kernel.org", "time": "Thu Sep 10 11:28:05 2026 +0300" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Sep 10 11:28:05 2026 +0300" }, "message": "Merge pull request #1801 from SoapGentoo/lttng-static-libs\n\nFix static build against lttng" }, { "commit": "136666a396a81f65c9a7ff8764fc37dc41bb64ec", "tree": "f95277954b228ed5fb29156467a0d02c47d29ea5", "parents": [ "e84c099f943aa186dab852435fd81288d94c66d5" ], "author": { "name": "David Seifert", "email": "soap@gentoo.org", "time": "Wed Sep 09 21:45:37 2026 +0200" }, "committer": { "name": "David Seifert", "email": "soap@gentoo.org", "time": "Wed Sep 09 21:45:37 2026 +0200" }, "message": "Fix static build against lttng\n\n* With `cmake -DENABLE_STATIC\u003d1 -DTRACING\u003dLTTNG ..`:\n\n /tmp/rdma-core/providers/efa/efa_trace.h:16:38: fatal error: efa_trace.h: No such file or directory\n 16 | #define LTTNG_UST_TRACEPOINT_INCLUDE \"efa_trace.h\"\n | ^~~~~~~~~~~~~\n compilation terminated.\n ninja: build stopped: subcommand failed.\n\nSigned-off-by: David Seifert \u003csoap@gentoo.org\u003e\n" }, { "commit": "d9d13418e9a291a43ebdeb5646d57b163d4155a0", "tree": "f745d5424501fdca1335abf2fa661e2f3a29ba07", "parents": [ "e84c099f943aa186dab852435fd81288d94c66d5" ], "author": { "name": "Michal Schmidt", "email": "mschmidt@redhat.com", "time": "Wed Sep 09 10:26:40 2026 +0200" }, "committer": { "name": "Michal Schmidt", "email": "mschmidt@redhat.com", "time": "Wed Sep 09 10:36:30 2026 +0200" }, "message": "COPYING.GPL2: update FSF address\n\nThe Free Software Foundation closed its physical office on Franklin\nStreet, Boston, in 2024. The current recommended text of the GPLv2\nreplaces the physical address with a URL.\n\nReplace COPYING.GPL2 with the latest revision, downloaded from\nhttps://www.gnu.org/licenses/old-licenses/gpl-2.0.txt\n\nIt also replaces the fictional company president name \"Ty Coon\" with\n\"Moe Ghoul\".\n\nThis silences a rpmlint message:\nE: incorrect-fsf-address /usr/share/licenses/rdma-core-common/COPYING.GPL2\n\nSigned-off-by: Michal Schmidt \u003cmschmidt@redhat.com\u003e\n" }, { "commit": "e84c099f943aa186dab852435fd81288d94c66d5", "tree": "489335e9937c1ae3ddd3c479397af0f874061446", "parents": [ "58e40801bfed5a8befc0881594820fa0a0baa4a1" ], "author": { "name": "Leon Romanovsky", "email": "leon@kernel.org", "time": "Sun Sep 06 10:12:09 2026 +0300" }, "committer": { "name": "Leon Romanovsky", "email": "leon@kernel.org", "time": "Sun Sep 06 10:12:09 2026 +0300" }, "message": "Update library version to be 66.0\n\nSigned-off-by: Leon Romanovsky \u003cleon@kernel.org\u003e\n" }, { "commit": "58e40801bfed5a8befc0881594820fa0a0baa4a1", "tree": "95e4a14b20a20ff168c6c249289a7b420002955d", "parents": [ "7b92fcfd6de7801450ae3b9e44f5ca78accba555" ], "author": { "name": "Zhiwei Zhang", "email": "zhangzhiwei@bitintelligence.io", "time": "Tue Jul 21 14:03:12 2026 +0800" }, "committer": { "name": "Leon Romanovsky", "email": "leonro@nvidia.com", "time": "Sun Sep 06 03:02:53 2026 -0400" }, "message": "pyverbs: Update MW rkey after type 2 bind\n\nset_bind_wr() assigns the incremented rkey to the bind WR but leaves MW.rkey\nunchanged. After the bind succeeds, applications that publish MW.rkey to the\npeer send the old rkey, while the NIC has already bound the MW with the new\nrkey. Remote access using the stale rkey consequently fails with a remote\naccess error.\n\nSynchronize MW.rkey with the rkey of successfully posted IBV_WR_BIND_MW\nrequests. When posting a WR list partially fails, only Bind WRs before bad_wr\nare updated, since those are the requests accepted by ibv_post_send().\n\nSigned-off-by: Zhiwei Zhang \u003czhangzhiwei@bitintelligence.io\u003e\nSigned-off-by: Leon Romanovsky \u003cleonro@nvidia.com\u003e\n" }, { "commit": "7b92fcfd6de7801450ae3b9e44f5ca78accba555", "tree": "bb1c8a6fedd02fe49c9aada64459257a0e19a915", "parents": [ "aa7f6bf84dbe291bb93b997653d546fe4dfb2f73", "0fa5b92d72e894cb05d0a059fe3eae569b26c365" ], "author": { "name": "Leon Romanovsky", "email": "leon@kernel.org", "time": "Sun Sep 06 09:54:37 2026 +0300" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Sun Sep 06 09:54:37 2026 +0300" }, "message": "Merge pull request #1794 from qvicksilver/fix-smi-gsi-ethernet-selection\n\nlibibumad: exclude Ethernet ports from SMI/GSI pairs" }, { "commit": "aa7f6bf84dbe291bb93b997653d546fe4dfb2f73", "tree": "46fb8777bb85cd82ad27bfcaf604cd75f1e0f763", "parents": [ "9fa48416169c28dda86add5a741dd45bec4da9c9", "172c26bbf7f2af63565b0ce0bd1f0b6b6eded5f4" ], "author": { "name": "Leon Romanovsky", "email": "leon@kernel.org", "time": "Sun Sep 06 09:48:44 2026 +0300" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Sun Sep 06 09:48:44 2026 +0300" }, "message": "Merge pull request #1797 from lishuang1986/lishuang/rc_pingpong-ipv6\n\nrc_pingpong: Prefer IPv6 wildcard when binding control channel" }, { "commit": "9fa48416169c28dda86add5a741dd45bec4da9c9", "tree": "b6d91f380b9bd241fdf5a938c1586712910e8015", "parents": [ "c7fce2791d587b9bfa15476533fa604bd6d5d172", "18e5cdf3b2eafade3f8a77a074d9ab76cec0c4af" ], "author": { "name": "Leon Romanovsky", "email": "leon@kernel.org", "time": "Sun Sep 06 09:47:12 2026 +0300" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Sun Sep 06 09:47:12 2026 +0300" }, "message": "Merge pull request #1758 from arrowd/e2k\n\nutil/udma_barrier.h: Add barriers support for Elbrus2000" }, { "commit": "c7fce2791d587b9bfa15476533fa604bd6d5d172", "tree": "a9dd63f9125d262e30d79734db96c12f3e63a8b9", "parents": [ "e441de3951613ce80e077a8a8a2befaf51206668", "dc30d9bc6d7e0ca4c23bc022fd843c8823c261bd" ], "author": { "name": "Leon Romanovsky", "email": "leon@kernel.org", "time": "Sun Sep 06 09:43:02 2026 +0300" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Sun Sep 06 09:43:02 2026 +0300" }, "message": "Merge pull request #1789 from ShacharKagan/buf-fd-devx\n\ntests: Add DevX traffic over dmabuf UMEMs" }, { "commit": "e441de3951613ce80e077a8a8a2befaf51206668", "tree": "b6415f2c547e6b262004a7abad2a0e0d20fe581c", "parents": [ "8b3a3e64dd8c15cf615dc4095ebff4ce515c2ce4", "710860d088c4c77fa1bdcbea66cfbce726cc87aa" ], "author": { "name": "Leon Romanovsky", "email": "leon@kernel.org", "time": "Sun Sep 06 09:41:12 2026 +0300" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Sun Sep 06 09:41:12 2026 +0300" }, "message": "Merge pull request #1790 from selvintxavier/wr_api_fixes\n\nbnxt_re/lib: Fixes in WR APIs" }, { "commit": "172c26bbf7f2af63565b0ce0bd1f0b6b6eded5f4", "tree": "9c53083490a635b423a4253ab4d9e8052caed797", "parents": [ "8b3a3e64dd8c15cf615dc4095ebff4ce515c2ce4" ], "author": { "name": "Shuang Li", "email": "shuali2026@gmail.com", "time": "Wed Sep 02 15:31:18 2026 +0800" }, "committer": { "name": "Shuang Li", "email": "shuali2026@gmail.com", "time": "Wed Sep 02 15:39:32 2026 +0800" }, "message": "rc_pingpong: Prefer IPv6 wildcard when binding control channel\n\nBind the server\u0027s control channel to the IPv6 wildcard ([::]) so IPv6\nclients can reach it; with the Linux-default dual-stack [::] socket,\nIPv4 clients are accepted as well. Fall back to the IPv4 wildcard\n(0.0.0.0) when IPv6 is not available on the host.\n\nSigned-off-by: Shuang Li \u003cshuali2026@gmail.com\u003e\nAssisted-by: Zhipu:glm-5.3-flash\n" }, { "commit": "8b3a3e64dd8c15cf615dc4095ebff4ce515c2ce4", "tree": "e59fd4c4a7c2762958350b32045a5d9ef3df694a", "parents": [ "13e67972aba8bd01a3eb0c6aea900535f6fab7f6", "8bc76f2d55c703201649c985ac31cfb828c916c6" ], "author": { "name": "Yishai Hadas", "email": "yishaih@mellanox.com", "time": "Sun Aug 30 13:53:17 2026 +0300" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Sun Aug 30 13:53:17 2026 +0300" }, "message": "Merge pull request #1793 from yishaih/misc\n\n[mlx4, mthca]: Fix signed-overflow as part of cq cleanup" }, { "commit": "13e67972aba8bd01a3eb0c6aea900535f6fab7f6", "tree": "5b8fedf2a40a0b851ba9f0c36df6251fac3bef49", "parents": [ "ac6444eb19c592742201d9a963fed5d16a2fc8b9", "2dc29c114f5765758cf3695ab3c428e05bb133c7" ], "author": { "name": "Yishai Hadas", "email": "yishaih@mellanox.com", "time": "Sun Aug 30 13:50:55 2026 +0300" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Sun Aug 30 13:50:55 2026 +0300" }, "message": "Merge pull request #1791 from yishaih/mlx5_misc\n\nmlx5: Misc. fixes" }, { "commit": "ac6444eb19c592742201d9a963fed5d16a2fc8b9", "tree": "6dea85ef04c898038178a50513218b6c14a7b434", "parents": [ "1229eaa0471de7e3fbbe144b5839e301ead05334", "2e9811b6e7feaa33db8b65ca652a6cbccbe7ce11" ], "author": { "name": "Leon Romanovsky", "email": "leon@kernel.org", "time": "Sun Aug 30 10:59:39 2026 +0300" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Sun Aug 30 10:59:39 2026 +0300" }, "message": "Merge pull request #1796 from snehal-sanghvi/snsanghvi/cq_arming\n\nproviders/mana: fix lost CQ notification when re-arming without polling" }, { "commit": "2e9811b6e7feaa33db8b65ca652a6cbccbe7ce11", "tree": "6dea85ef04c898038178a50513218b6c14a7b434", "parents": [ "1229eaa0471de7e3fbbe144b5839e301ead05334" ], "author": { "name": "Snehal Sanghvi", "email": "snsanghvi@microsoft.com", "time": "Thu Aug 27 18:24:55 2026 +0000" }, "committer": { "name": "Snehal Sanghvi", "email": "snsanghvi@microsoft.com", "time": "Thu Aug 27 18:25:07 2026 +0000" }, "message": "providers/mana: fix lost CQ notification when re-arming without polling\n\nWhen a CQ is re-armed with nothing polled since the last doorbell,\ngdma_ring_cq_doorbell() advanced the reported consumer index by one so\nthe doorbell would differ from the previous one and take effect. On an\nidle CQ that index runs past what the device has produced, so the device\nrejects the whole doorbell including the arm bit, and the stale index\nmakes the next re-arm fail too. The CQ is left un-armed and completions\nraise no completion-channel event.\n\nOnly claim the next index once the owner bits show the device produced\nthat CQE. If it has not, no notification can have fired, so the CQ is\nstill armed and needs no doorbell at all.\n\nFixes: 6dd8578d46e4 (\"providers/mana: Use poll credit for arming of cqs\")\nSigned-off-by: Snehal Sanghvi \u003csnsanghvi@microsoft.com\u003e\nReviewed-by: Konstantin Taranov \u003ckotaranov@microsoft.com\u003e\n" }, { "commit": "1229eaa0471de7e3fbbe144b5839e301ead05334", "tree": "e3a3137701afa349b5641db6d94661d4c7aec990", "parents": [ "f91609ec2c924502b88de2fe4083c75f30ddd12b", "7770d181a9d20092f02eff22a0303855292ccbfd" ], "author": { "name": "Jason Gunthorpe", "email": "jgg@nvidia.com", "time": "Wed Aug 26 15:39:27 2026 -0300" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Wed Aug 26 15:39:27 2026 -0300" }, "message": "Merge pull request #1765 from TaranovK/kotaranov/robust\n\nproviders/mana: robust udata support" }, { "commit": "7770d181a9d20092f02eff22a0303855292ccbfd", "tree": "9ff91167c3540fed18351f5273f5ae26869901db", "parents": [ "4f822119669ef42187be2fd79bad87c932112e22" ], "author": { "name": "Konstantin Taranov", "email": "kotaranov@microsoft.com", "time": "Wed Jun 24 13:37:00 2026 +0200" }, "committer": { "name": "Konstantin Taranov", "email": "kotaranov@microsoft.com", "time": "Wed Aug 26 17:44:52 2026 +0000" }, "message": "providers/mana: Robust udata support\n\nUpdate a field name in create CQ request to support robust udata.\n\nUpdate kernel headers\n\nTo commit: eb70d83a8645 (\"RDMA/mana_ib: Adopt robust udata\").\n\nSigned-off-by: Konstantin Taranov \u003ckotaranov@microsoft.com\u003e\n" }, { "commit": "f91609ec2c924502b88de2fe4083c75f30ddd12b", "tree": "8e01a053ec6580b35b39d0a2da29441f6a4a4e4b", "parents": [ "fef055fcce99b330ef620a53096256ad18f5f801", "7d4ab03859dd46c572e723a8f4401d1d3f38ec52" ], "author": { "name": "Jason Gunthorpe", "email": "jgg@nvidia.com", "time": "Wed Aug 26 14:34:37 2026 -0300" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Wed Aug 26 14:34:37 2026 -0300" }, "message": "Merge pull request #1719 from TaranovK/kotaranov/ucqp\n\nproviders/mana: UC QP support" }, { "commit": "fef055fcce99b330ef620a53096256ad18f5f801", "tree": "d2b5e65b07103ea542e93aa2fe22b9ffb61a95e6", "parents": [ "691953d8d502f54088f776c5ba2aeed0a5ac945d", "0fea30ea9279fbd832a11354b583d44688b254da" ], "author": { "name": "Jason Gunthorpe", "email": "jgg@nvidia.com", "time": "Wed Aug 26 14:31:54 2026 -0300" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Wed Aug 26 14:31:54 2026 -0300" }, "message": "Merge pull request #1696 from TaranovK/kotaranov/pd_ext\n\nproviders/mana: expose PD number via manadv " }, { "commit": "7d4ab03859dd46c572e723a8f4401d1d3f38ec52", "tree": "ed3be96e4b8bf59e19772eeb03b0bb18699a17e7", "parents": [ "a85cecfce71a6815122b54b1669e7ffbca03123b" ], "author": { "name": "Konstantin Taranov", "email": "kotaranov@microsoft.com", "time": "Mon Mar 09 15:51:35 2026 +0100" }, "committer": { "name": "Konstantin Taranov", "email": "kotaranov@microsoft.com", "time": "Wed Aug 26 08:18:44 2026 +0000" }, "message": "providers/mana: UC QP support\n\nImplement creation and destruction of UC QPs.\nAdd processing of UC send CQEs.\n\nSigned-off-by: Konstantin Taranov \u003ckotaranov@microsoft.com\u003e\n" }, { "commit": "a85cecfce71a6815122b54b1669e7ffbca03123b", "tree": "34b0752f6787eadf88b9c4cd96ad3c01f4dc6a56", "parents": [ "4f822119669ef42187be2fd79bad87c932112e22" ], "author": { "name": "Konstantin Taranov", "email": "kotaranov@microsoft.com", "time": "Fri Aug 14 12:26:23 2026 +0000" }, "committer": { "name": "Konstantin Taranov", "email": "kotaranov@microsoft.com", "time": "Wed Aug 26 08:18:44 2026 +0000" }, "message": "Update kernel headers\n\nTo commit: 6aad80a1d4e7 (\"RDMA/mana_ib: UC QP support for UAPI\").\n\nSigned-off-by: Konstantin Taranov \u003ckotaranov@microsoft.com\u003e\n" }, { "commit": "0fea30ea9279fbd832a11354b583d44688b254da", "tree": "a6495aa48cd669ea0a4e6a9c11db3214aad713d7", "parents": [ "776585d70a89d0f91ebc4975bb0532d4612cd88a" ], "author": { "name": "zhiyueqiu", "email": "zhiyueqiu@microsoft.com", "time": "Fri Jan 30 13:35:12 2026 +0000" }, "committer": { "name": "Konstantin Taranov", "email": "kotaranov@microsoft.com", "time": "Wed Aug 26 08:17:10 2026 +0000" }, "message": "providers/mana: expose PD number via manadv\n\nExpose PD number to manadv using manadv_init_obj().\nAllow users to request short PDN using new manadv_alloc_pd() API.\n\nSigned-off-by: Konstantin Taranov \u003ckotaranov@microsoft.com\u003e\nSigned-off-by: Zhiyue Qiu \u003czhiyueqiu@microsoft.com\u003e\n" }, { "commit": "776585d70a89d0f91ebc4975bb0532d4612cd88a", "tree": "1f6669ecb4266002cdc22d4fb20d8f1d18dc5fcc", "parents": [ "4f822119669ef42187be2fd79bad87c932112e22" ], "author": { "name": "Konstantin Taranov", "email": "kotaranov@microsoft.com", "time": "Fri Aug 14 12:11:41 2026 +0000" }, "committer": { "name": "Konstantin Taranov", "email": "kotaranov@microsoft.com", "time": "Wed Aug 26 08:17:10 2026 +0000" }, "message": "Update kernel headers\n\nTo commit: 1773ca1a8912 (\"RDMA/mana_ib: return PD number to the user\").\n\nSigned-off-by: Konstantin Taranov \u003ckotaranov@microsoft.com\u003e\n" }, { "commit": "8bc76f2d55c703201649c985ac31cfb828c916c6", "tree": "3d045f58b28af9fd731cb457332e4d1ad682e7aa", "parents": [ "9d43cfc0896433e28a3a3ac713aa7c465c8df93c" ], "author": { "name": "Yishai Hadas", "email": "yishaih@nvidia.com", "time": "Tue Aug 25 09:58:48 2026 +0300" }, "committer": { "name": "Yishai Hadas", "email": "yishaih@nvidia.com", "time": "Tue Aug 25 12:18:52 2026 +0300" }, "message": "mthca: Fix signed-overflow UB in __mthca_cq_clean() sweep condition\n\nThe backward sweep in __mthca_cq_clean() used:\n\n while ((int) --prod_index - (int) cq-\u003econs_index \u003e\u003d 0)\n\nBoth operands are uint32_t. Promoting them to int and then subtracting\nis undefined behaviour when the result overflows (C11 §6.5p5). GCC and\nClang exploit that UB: they fold \"(int)a - (int)b \u003e\u003d 0\" into the plain\nsigned compare \"(int)a \u003e\u003d (int)b\", which has no exit when cons_index is\n0x80000000 (INT_MIN), causing an infinite loop with the CQ spinlock held.\n\nReplace with a plain unsigned equality check — identical fix to the one\napplied to providers/mlx5/cq.c and providers/mlx4/cq.c:\n\n while (prod_index !\u003d cq-\u003econs_index) { --prod_index; ... }\n\nprod_index starts at the value found by the forward scan, which begins\nat cons_index and only increments, so prod_index \u003e\u003d cons_index always\nholds. Decrementing prod_index each iteration reaches cons_index in\nexactly (prod_index - cons_index) steps. No arithmetic on the loop\ncondition, no signed casts, no compiler-visible UB.\n\nFixes: f0721148654c (\"Fix long request lists for Tavor HCAs\")\nSigned-off-by: Yishai Hadas \u003cyishaih@nvidia.com\u003e\n" }, { "commit": "9d43cfc0896433e28a3a3ac713aa7c465c8df93c", "tree": "8f0bc71d5aa642493bd3403799a190b57ba1004e", "parents": [ "691953d8d502f54088f776c5ba2aeed0a5ac945d" ], "author": { "name": "Yishai Hadas", "email": "yishaih@nvidia.com", "time": "Tue Aug 25 09:58:28 2026 +0300" }, "committer": { "name": "Yishai Hadas", "email": "yishaih@nvidia.com", "time": "Tue Aug 25 12:18:31 2026 +0300" }, "message": "mlx4: Fix signed-overflow UB in mlx4_cq_clean() sweep condition\n\nThe backward sweep in mlx4_cq_clean() used:\n\n while ((int) --prod_index - (int) cq-\u003econs_index \u003e\u003d 0)\n\nBoth operands are uint32_t. Promoting them to int and then subtracting\nis undefined behaviour when the result overflows (C11 §6.5p5). GCC and\nClang exploit that UB: they fold \"(int)a - (int)b \u003e\u003d 0\" into the plain\nsigned compare \"(int)a \u003e\u003d (int)b\", which has no exit when cons_index is\n0x80000000 (INT_MIN), causing an infinite loop with the CQ spinlock held.\n\nReplace with a plain unsigned equality check — identical fix to the one\napplied to providers/mlx5/cq.c:\n\n while (prod_index !\u003d cq-\u003econs_index) { --prod_index; ... }\n\nprod_index starts at the value found by the forward scan, which begins\nat cons_index and only increments, so prod_index \u003e\u003d cons_index always\nholds. Decrementing prod_index each iteration reaches cons_index in\nexactly (prod_index - cons_index) steps. No arithmetic on the loop\ncondition, no signed casts, no compiler-visible UB.\n\nFixes: 3e44e8d14a32 (\"Implement mlx4_cq_clean()\")\nSigned-off-by: Yishai Hadas \u003cyishaih@nvidia.com\u003e\n" }, { "commit": "0fa5b92d72e894cb05d0a059fe3eae569b26c365", "tree": "ed17d1ac1f730caade7d5627aed7d9d66ff1661b", "parents": [ "691953d8d502f54088f776c5ba2aeed0a5ac945d" ], "author": { "name": "Jonathan Süssemilch Poulain", "email": "jpoulain@coreweave.com", "time": "Tue Aug 25 10:52:47 2026 +0200" }, "committer": { "name": "Jonathan Süssemilch Poulain", "email": "jpoulain@coreweave.com", "time": "Tue Aug 25 10:53:36 2026 +0200" }, "message": "libibumad: exclude Ethernet ports from SMI/GSI pairs\n\numad_get_smi_gsi_pairs() processes every RDMA device returned by\numad_get_cas_names(). On a host with both RoCE and native InfiniBand\ndevices, an active Ethernet port without IsSMDisabled in its capability\nmask is therefore assigned an SMI name and selected first. Opening its\nUMAD device succeeds, but registering IB_SMI_CLASS fails with\nEPROTONOSUPPORT instead of continuing to the usable InfiniBand port.\n\nSkip non-InfiniBand link layers while counting port GUIDs and while\nconstructing SMI/GSI pairs. Applying the filter in both passes keeps\nEthernet devices from affecting planarized-port detection.\n\nFixes: be54b52e94be (\"libibumad: Add new API to support SMI/GSI seperation\")\nSigned-off-by: Jonathan Süssemilch Poulain \u003cjpoulain@coreweave.com\u003e\n" }, { "commit": "2dc29c114f5765758cf3695ab3c428e05bb133c7", "tree": "774ea44dbb659899e0015ad060f0d2127d617e0c", "parents": [ "d73d3288c5e5aa65b7a8ca5b1593745aedeb5723" ], "author": { "name": "Yishai Hadas", "email": "yishaih@nvidia.com", "time": "Thu Aug 20 15:20:34 2026 +0300" }, "committer": { "name": "Yishai Hadas", "email": "yishaih@nvidia.com", "time": "Tue Aug 25 11:28:30 2026 +0300" }, "message": "mlx5: Fix signed-overflow UB in __mlx5_cq_clean() sweep condition\n\nThe backward sweep in __mlx5_cq_clean() used:\n\n while ((int) --prod_index - (int) cq-\u003econs_index \u003e\u003d 0)\n\nBoth operands are uint32_t. Promoting them to int and then subtracting\nis undefined behaviour when the result overflows (C11 §6.5p5). GCC and\nClang exploit that UB: they fold \"(int)a - (int)b \u003e\u003d 0\" into the plain\nsigned compare \"(int)a \u003e\u003d (int)b\", which has no exit when cons_index is\n0x80000000 (INT_MIN), causing an infinite loop with the CQ spinlock held.\nEvery other thread polling that CQ blocks; the kernel-side QP is already\ndestroyed, so the process must be killed to recover. A long-lived process\nsharing one CQ across many short-lived QPs hits this every 2^32\ncompletions (~90 s at 24 M CQE/s, ~10 days at 2.4 k CQE/s).\n\nReplace with a plain unsigned equality check:\n\n while (prod_index !\u003d cq-\u003econs_index) { --prod_index; ... }\n\nprod_index starts at the value found by the forward scan, which begins\nat cons_index and only increments, so prod_index \u003e\u003d cons_index always\nholds. Decrementing prod_index each iteration reaches cons_index in\nexactly (prod_index - cons_index) steps. No arithmetic on the loop\ncondition, no signed casts, no compiler-visible UB.\n\nFixes: 8c4791ae2395 (\"libmlx5: First version of libmlx5\")\nSigned-off-by: Yishai Hadas \u003cyishaih@nvidia.com\u003e\n" }, { "commit": "d73d3288c5e5aa65b7a8ca5b1593745aedeb5723", "tree": "9f1c0c91aa72f18d752d5dca6bdaec0b475fcd4d", "parents": [ "691953d8d502f54088f776c5ba2aeed0a5ac945d" ], "author": { "name": "Maher Sanalla", "email": "msanalla@nvidia.com", "time": "Thu Aug 13 16:12:10 2026 +0300" }, "committer": { "name": "Yishai Hadas", "email": "yishaih@nvidia.com", "time": "Sun Aug 23 10:43:56 2026 +0300" }, "message": "mlx5: Fix dbrec alloc returning garbage pointer on failure\n\nWhen mlx5_alloc_dbrec() falls back from the custom allocator to the\ndefault one, db is not cleared before jumping to default_alloc. If the\ndefault allocator also fails, the function returns db still holding a\nnon-NULL garbage value instead of NULL.\n\ncreate_qp() checks the return value for NULL to detect failure. Since it\nis not NULL, create_qp() proceeds and crashes dereferencing\nqp-\u003edb[MLX5_RCV_DBR].\n\nClear db before entering the default_alloc path so any failure there\nreturns NULL.\n\nFixes: acee8f6e64b3 (\"mlx5: Add custom allocation support for DBR\")\nSigned-off-by: Maher Sanalla \u003cmsanalla@nvidia.com\u003e\nSigned-off-by: Yishai Hadas \u003cyishaih@nvidia.com\u003e\n" }, { "commit": "691953d8d502f54088f776c5ba2aeed0a5ac945d", "tree": "625c14a74e3187a6b6ba1d154bff0666f41259d1", "parents": [ "9715b7b20ebf5f1b3d9978cce32fc865c8e92dfb", "ce466b33775cd383a18a29f964ea5303c101fb0d" ], "author": { "name": "Leon Romanovsky", "email": "leon@kernel.org", "time": "Thu Aug 20 09:23:24 2026 +0300" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Aug 20 09:23:24 2026 +0300" }, "message": "Merge pull request #1785 from Yurii-huang/yurii-master\n\nadd pyverbs version from pkg version" }, { "commit": "ce466b33775cd383a18a29f964ea5303c101fb0d", "tree": "ab3a61de7046f0c9a4490f7da50987055c76820c", "parents": [ "d45834e0fe3ff1248e40d995f2f51c51739e6f1c" ], "author": { "name": "Yurii Huang", "email": "funningc0217@foxmail.com", "time": "Thu Aug 13 11:30:08 2026 +0800" }, "committer": { "name": "Yurii Huang", "email": "funningc0217@foxmail.com", "time": "Thu Aug 20 11:28:07 2026 +0800" }, "message": "pyverbs: add pyverbs version from pkg version\n\nThe module\u0027s version is missing, so users can\u0027t do version matching or checks.\n\nSigned-off-by: Yurii Huang \u003cfunningc0217@foxmail.com\u003e\n" }, { "commit": "9715b7b20ebf5f1b3d9978cce32fc865c8e92dfb", "tree": "4c5248bcaa9205e89a08b6abcb57b01e029f1bec", "parents": [ "a4b8d50e6357a4a581347111396fc8218cad838c", "c818b7d307201cbda176ed0fe22b9af742287366" ], "author": { "name": "Leon Romanovsky", "email": "leon@kernel.org", "time": "Mon Aug 17 21:53:25 2026 +0300" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Mon Aug 17 21:53:25 2026 +0300" }, "message": "Merge pull request #1779 from EdwardSro/pr-rdma-topo-vr\n\nrdma_topo: NUMA-based topologies and multi-PF systems" }, { "commit": "710860d088c4c77fa1bdcbea66cfbce726cc87aa", "tree": "1176ccb3e54b60f807b3fd121db34f6f4455ffd4", "parents": [ "c7025ca753b00711beee63fa02b0bfcee69fd433" ], "author": { "name": "Selvin Xavier", "email": "selvin.xavier@broadcom.com", "time": "Fri Jan 16 12:14:10 2026 +0530" }, "committer": { "name": "Selvin Xavier", "email": "selvin.xavier@broadcom.com", "time": "Mon Aug 17 09:15:20 2026 -0700" }, "message": "bnxt_re/lib: Fix slot count accumulation in WR API inline data path\n\nThe bnxt_re_send_wr_set_inline_data function incorrectly used the\nused_slot_cnt as an accumulator when posting multiple inline WRs\nin a batch. This resulted in queue index overflow leading to segmenataion\nfault.\n\nFix is to pass the cur_slot_cnt to bnxt_re_put_wr_inline for batch\naccumulation. Calculate and set used_slot_cnt per-WR. Remove incorrect\naddition of used_slot_cnt to cur_slot_cnt.\n\nFixes: 6514d99eb8aa (\"bnxt_re/lib: Add WR API send functions\")\nReviewed-by: Kalesh AP \u003ckalesh-anakkur.purayil@broadcom.com\u003e\nSigned-off-by: Selvin Xavier \u003cselvin.xavier@broadcom.com\u003e\n" }, { "commit": "c7025ca753b00711beee63fa02b0bfcee69fd433", "tree": "e46273b702b3fbbad56c26f753c2cd21e4fe01d9", "parents": [ "cd7f4b2b55d37243ff176e58cfb514dd54360008" ], "author": { "name": "Sriharsha Basavapatna", "email": "sriharsha.basavapatna@broadcom.com", "time": "Mon Jan 05 15:31:04 2026 +0530" }, "committer": { "name": "Selvin Xavier", "email": "selvin.xavier@broadcom.com", "time": "Mon Aug 17 08:47:34 2026 -0700" }, "message": "bnxt_re/lib: Fix for larger WR post_list sizes\n\nIn bnxt_re_send_wr_complete(), there is a type truncation bug.\n\nThe total count of slots saved in cur_slots_cnt is a uint32_t.\nThis gets assigned to a uint8_t (slots) before passing it to\nbnxt_re_incr_tail() since it takes a uint8_t argument for the\nslot count. And in the process, the value gets truncated.\n\nFix the type of slots variable.\n\nFixes: 6514d99eb8aa (\"bnxt_re/lib: Add WR API send functions\")\nReviewed-by: Selvin Xavier \u003cselvin.xavier@broadcom.com\u003e\nReviewed-by: Kalesh AP \u003ckalesh-anakkur.purayil@broadcom.com\u003e\nReviewed-by: Kashyap Desai \u003ckashyap.desai@broadcom.com\u003e\nSigned-off-by: Sriharsha Basavapatna \u003csriharsha.basavapatna@broadcom.com\u003e\nSigned-off-by: Selvin Xavier \u003cselvin.xavier@broadcom.com\u003e\n" }, { "commit": "cd7f4b2b55d37243ff176e58cfb514dd54360008", "tree": "c0899bdb02ebef116645e529d699f9f49a0b3c9f", "parents": [ "a4b8d50e6357a4a581347111396fc8218cad838c" ], "author": { "name": "Kalesh AP", "email": "kalesh-anakkur.purayil@broadcom.com", "time": "Thu Dec 18 22:13:18 2025 -0800" }, "committer": { "name": "Selvin Xavier", "email": "selvin.xavier@broadcom.com", "time": "Mon Aug 17 08:45:54 2026 -0700" }, "message": "bnxt_re/lib: Fix issues in WR API callbacks\n\nREQ_WQE_FORMAT_ERROR is observed while running traffic with WR APIs\nand using \"--post_list 2\". This is because libray is not updating\nthe WQE header flags in send_wr_set_sge() callback after a wr_send().\n\nThe update is happening in send_wr_complete() which works well when\n\"--post_list 1\":\n\n\u003e\u003e bnxt_re_send_wr_start\n\u003e\u003e bnxt_re_send_wr_send\n\u003e\u003e bnxt_re_send_wr_set_sge\n\u003e\u003e bnxt_re_send_wr_complete\n\nBut has caused issues when using the option \"--post_list 2\" where a\nsend_wr_complete() is invoked like below:\n\n\u003e\u003e bnxt_re_send_wr_start\n\u003e\u003e bnxt_re_send_wr_send\n\u003e\u003e bnxt_re_send_wr_set_sge\n\u003e\u003e bnxt_re_send_wr_send\n\u003e\u003e bnxt_re_send_wr_set_sge\n\u003e\u003e bnxt_re_send_wr_complete\n\nThe header flags needs to be updated for every Work Requests to\nthe Hardware.\n\nFixes: 6514d99eb8aa (\"bnxt_re/lib: Add WR API send functions\")\nReviewed-by: Selvin Xavier \u003cselvin.xavier@broadcom.com\u003e\nSigned-off-by: Kalesh AP \u003ckalesh-anakkur.purayil@broadcom.com\u003e\nSigned-off-by: Selvin Xavier \u003cselvin.xavier@broadcom.com\u003e\n" }, { "commit": "dc30d9bc6d7e0ca4c23bc022fd843c8823c261bd", "tree": "2e01a77c38b3297f1833c99c534f99b809410d7a", "parents": [ "f1f77d422b5defa5beb7ad45c918a829901f7917" ], "author": { "name": "Daniel Hayon", "email": "dhayon@nvidia.com", "time": "Mon Jul 13 14:51:54 2026 +0300" }, "committer": { "name": "Shachar Kagan", "email": "skagan@nvidia.com", "time": "Sun Aug 16 13:42:36 2026 +0300" }, "message": "tests: Add DevX-on-CoCo traffic over Buf UMEMs\n\nA DMA-bounce CoCo device rejects a DevX RC QP on private memory,\nsince the NIC cannot DMA into it. Source the QP, CQ, doorbells and\ndata buffer from shared memory exported as dmabuf fds, run SEND_IMM\ntraffic over it, and skip on non-CC / non-DMA-bounce devices.\n\nSigned-off-by: Daniel Hayon \u003cdhayon@nvidia.com\u003e\nSigned-off-by: Shachar Kagan \u003cskagan@nvidia.com\u003e\n" }, { "commit": "f1f77d422b5defa5beb7ad45c918a829901f7917", "tree": "0c9c2fb6b8565875fb60703062f40bb82dfc4021", "parents": [ "a4b8d50e6357a4a581347111396fc8218cad838c" ], "author": { "name": "Daniel Hayon", "email": "dhayon@nvidia.com", "time": "Mon Jul 13 14:48:38 2026 +0300" }, "committer": { "name": "Shachar Kagan", "email": "skagan@nvidia.com", "time": "Sun Aug 16 13:42:36 2026 +0300" }, "message": "pyverbs: Add umem_addr setter to Mlx5UMEM\n\nWhen a DevX UMEM is registered from a dmabuf FD, userspace still needs\nthe backing memory\u0027s CPU address for WQE, CQE and doorbell access.\nAllow setting umem_addr after creation so the reported address matches\nthe external buffer without re-registering the UMEM.\n\nSigned-off-by: Daniel Hayon \u003cdhayon@nvidia.com\u003e\nSigned-off-by: Shachar Kagan \u003cskagan@nvidia.com\u003e\n" }, { "commit": "a4b8d50e6357a4a581347111396fc8218cad838c", "tree": "d2853863fc75dd990232d998d6f2408aacab82c6", "parents": [ "c1c5bf1f480312c07ed4d23f0feecf8b5fd73289", "4f822119669ef42187be2fd79bad87c932112e22" ], "author": { "name": "Jason Gunthorpe", "email": "jgg@nvidia.com", "time": "Tue Aug 11 10:56:39 2026 -0300" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Tue Aug 11 10:56:39 2026 -0300" }, "message": "Merge pull request #1788 from abhijitG-xlnx/phc\n\ntests: Align test_phc_timestamp with Cython 3.1.0 named enum imports" }, { "commit": "c818b7d307201cbda176ed0fe22b9af742287366", "tree": "bb70627ccbc637f13ce9f8832242bee6956e9f6d", "parents": [ "c51f753a7f06b1350ca6dd1f88a8c9e3f35d99b5" ], "author": { "name": "Vlad Dumitrescu", "email": "vdumitrescu@nvidia.com", "time": "Mon May 11 18:16:19 2026 -0700" }, "committer": { "name": "Edward Srouji", "email": "edwards@nvidia.com", "time": "Mon Aug 10 13:59:21 2026 +0300" }, "message": "rdma_topo: Add NUMA-based topology support\n\nSome platforms connect GPUs directly under a CPU root port rather than\nthrough a shared CX switch, making the existing Inline and DMA topology\ndetectors inapplicable. Add a new type of complex that groups NICs and\nGPUs by NUMA node.\nAdd two new root port device IDs mapped to a new vera_rp device type.\nMove parent/child PCI device linking into __load_devices so the parent\nrelationship is available during topology type detection.\n\nSigned-off-by: Vlad Dumitrescu \u003cvdumitrescu@nvidia.com\u003e\nSigned-off-by: Edward Srouji \u003cedwards@nvidia.com\u003e\n" }, { "commit": "c51f753a7f06b1350ca6dd1f88a8c9e3f35d99b5", "tree": "72f16a47f0a602ebee97419b26b242f59879f3a1", "parents": [ "a70c3fc3d9cf4fad153667e41a0f774d1740d979" ], "author": { "name": "Vlad Dumitrescu", "email": "vdumitrescu@nvidia.com", "time": "Mon Jul 13 14:39:41 2026 -0700" }, "committer": { "name": "Edward Srouji", "email": "edwards@nvidia.com", "time": "Mon Aug 10 13:57:05 2026 +0300" }, "message": "rdma_topo: Add unit tests for NVCX_Topo\n\nCover all branches of NVCX_Topo and its nested NIC and Board types\nusing mock PCIDevice objects.\n\nSigned-off-by: Vlad Dumitrescu \u003cvdumitrescu@nvidia.com\u003e\nSigned-off-by: Edward Srouji \u003cedwards@nvidia.com\u003e\n" }, { "commit": "a70c3fc3d9cf4fad153667e41a0f774d1740d979", "tree": "6a3cd86b61dbb8a2808d2a57b0ea50ef44741663", "parents": [ "d279dd41be09c77c1a87167f0c73dfef6fbdb12e" ], "author": { "name": "Vlad Dumitrescu", "email": "vdumitrescu@nvidia.com", "time": "Mon Jul 13 14:39:35 2026 -0700" }, "committer": { "name": "Edward Srouji", "email": "edwards@nvidia.com", "time": "Mon Aug 10 13:55:10 2026 +0300" }, "message": "rdma_topo: Add multi-PF and multi-NIC support\n\nAdd topology model that groups CX PFs into NICs (by shared parent\nbridge) and NICs into boards (by shared VPD SN). Useful for future\nsystem topologies with multiple CX PFs in the same complex.\n\nProduce both JSON (to_dict) and human-readable (topo_str) output with\ndeterministic ordering throughout.\n\nSigned-off-by: Vlad Dumitrescu \u003cvdumitrescu@nvidia.com\u003e\nSigned-off-by: Edward Srouji \u003cedwards@nvidia.com\u003e\n" }, { "commit": "d279dd41be09c77c1a87167f0c73dfef6fbdb12e", "tree": "f6c8d628c139b9b9279ce7235715eaf86de62809", "parents": [ "84efa49a380f37c00d29e37a059da9c66165be26" ], "author": { "name": "Vlad Dumitrescu", "email": "vdumitrescu@nvidia.com", "time": "Sat Jun 27 10:31:14 2026 -0700" }, "committer": { "name": "Edward Srouji", "email": "edwards@nvidia.com", "time": "Mon Aug 10 13:55:09 2026 +0300" }, "message": "rdma_topo: Parse SN from VPD\n\nParse the \"SN\" keyword from the VPD read-only block into a new\nPCIDevice.vpd_sn attribute. Will be used by the following patch to group\nCX NICs with the same SN into NIC boards.\n\nSigned-off-by: Vlad Dumitrescu \u003cvdumitrescu@nvidia.com\u003e\nSigned-off-by: Edward Srouji \u003cedwards@nvidia.com\u003e\n" }, { "commit": "84efa49a380f37c00d29e37a059da9c66165be26", "tree": "90f337e5ae450b7d95e10c82ea44916f602b5371", "parents": [ "852ab5ebbbf65822467936b69c088cbdfa26a308" ], "author": { "name": "Vlad Dumitrescu", "email": "vdumitrescu@nvidia.com", "time": "Thu Jul 02 11:38:50 2026 -0700" }, "committer": { "name": "Edward Srouji", "email": "edwards@nvidia.com", "time": "Mon Aug 10 13:49:59 2026 +0300" }, "message": "rdma_topo: Always output ATS state in JSON\n\nEmit the rdma_nic_ats boolean from NVCX_Inline_Complex.to_dict()\nunconditionally instead of omitting it when False. This lets consumers\nof the JSON output distinguish \"ATS off\" from \"field absent\" without\nhaving to know the emission convention.\n\nSigned-off-by: Vlad Dumitrescu \u003cvdumitrescu@nvidia.com\u003e\nSigned-off-by: Edward Srouji \u003cedwards@nvidia.com\u003e\n" }, { "commit": "852ab5ebbbf65822467936b69c088cbdfa26a308", "tree": "606eecfd0ce4b59784e0f62e12a2d3cc035d6c7a", "parents": [ "8db1b1f8f4a878cddbe52bdad95af6a30042a03f" ], "author": { "name": "Vlad Dumitrescu", "email": "vdumitrescu@nvidia.com", "time": "Wed May 27 15:24:56 2026 -0700" }, "committer": { "name": "Edward Srouji", "email": "edwards@nvidia.com", "time": "Mon Aug 10 13:48:47 2026 +0300" }, "message": "rdma_topo: Overhaul error handling to avoid tracebacks\n\nA prior patch introduced a regression where certain topologies that were\npreviously rejected cleanly by printing the \"not supported\" message\ninstead fell through to the inline topology path and raised an unhandled\nValueError.\n\nReplace the TOPO_NOT_SUPPORTED singleton and has_cx_dma/has_gpu_and_nic\nboolean flags with structured alternatives:\n\n * CommandError.Level (ERROR/WARNING) with self-formatting __str__\n * TopoNotSupportedError: unrecognized topology (expected on\n yet to be supported platforms)\n * TopoUnexpectedError: inconsistency in the topology which should not\n happen in practice (prompts the user to report the issue)\n * DumpParsingError: malformed sysfs dump input\n * PCITopo.TopoType enum (INLINE/DMA) replacing the boolean pair\n\nDrop .supported property from PCITopo and all post-construction checks\ndone by callers.\n\nFixes: f8f0f10797f0 (\"rdma_topo: Add support for inline topologies\")\nSigned-off-by: Vlad Dumitrescu \u003cvdumitrescu@nvidia.com\u003e\nSigned-off-by: Edward Srouji \u003cedwards@nvidia.com\u003e\n" }, { "commit": "8db1b1f8f4a878cddbe52bdad95af6a30042a03f", "tree": "6bbe7e19cdbf1740038cc97ae16515a759a95bb1", "parents": [ "d45834e0fe3ff1248e40d995f2f51c51739e6f1c" ], "author": { "name": "Vlad Dumitrescu", "email": "vdumitrescu@nvidia.com", "time": "Tue Jun 02 19:53:17 2026 -0700" }, "committer": { "name": "Edward Srouji", "email": "edwards@nvidia.com", "time": "Mon Aug 10 13:34:03 2026 +0300" }, "message": "rdma_topo: Add CX9 device ID\n\nAdd the ConnectX-9 PCI device ID (0x1025) to the pci_device_types\nmapping so that CX9 network functions are classified as cx_nic, on par\nwith the already-supported CX7 (0x1021) and CX8 (0x1023). Without this\nmapping rdma_topo does not recognize CX9 NICs when walking the PCI\ntopology.\n\nSigned-off-by: Vlad Dumitrescu \u003cvdumitrescu@nvidia.com\u003e\nSigned-off-by: Edward Srouji \u003cedwards@nvidia.com\u003e\n" }, { "commit": "4f822119669ef42187be2fd79bad87c932112e22", "tree": "d2853863fc75dd990232d998d6f2408aacab82c6", "parents": [ "c1c5bf1f480312c07ed4d23f0feecf8b5fd73289" ], "author": { "name": "Abhijit Gangurde", "email": "abhijit.gangurde@amd.com", "time": "Mon Aug 10 14:39:24 2026 +0530" }, "committer": { "name": "Abhijit Gangurde", "email": "abhijit.gangurde@amd.com", "time": "Mon Aug 10 15:37:13 2026 +0530" }, "message": "tests: Align test_phc_timestamp with Cython 3.1.0 named enum imports\n\nUse fully qualified named enum references and explicit imports to\nmatch the pyverbs Cython 3.1.0 alignment.\n\nFixes: d7cdbe1674c7 (\"tests: test PHC completion time stamp\")\nSigned-off-by: Abhijit Gangurde \u003cabhijit.gangurde@amd.com\u003e\n" }, { "commit": "c1c5bf1f480312c07ed4d23f0feecf8b5fd73289", "tree": "c1fbf95c7e0d4c8a7410018368b85af8765125a2", "parents": [ "ea22af0fdd079c73c4060e65476b1f4af91e3c58", "d7cdbe1674c72518b6f26d459e89586e80075d43" ], "author": { "name": "Leon Romanovsky", "email": "leon@kernel.org", "time": "Wed Aug 05 13:57:25 2026 +0300" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Wed Aug 05 13:57:25 2026 +0300" }, "message": "Merge pull request #1724 from abhijitG-xlnx/phc\n\nionic: Add PTP Hardware Clock (PHC) timestamping support" }, { "commit": "ea22af0fdd079c73c4060e65476b1f4af91e3c58", "tree": "6f8c39ac019d59106ccf32aadec7535ebffb8b11", "parents": [ "1de944a89faabd31806719172248263b1b986823", "1f9f73c28b006bcb4b37bfc594f12c173156c385" ], "author": { "name": "Leon Romanovsky", "email": "leon@kernel.org", "time": "Wed Aug 05 11:28:47 2026 +0300" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Wed Aug 05 11:28:47 2026 +0300" }, "message": "Merge pull request #1784 from hz-cheng/providers-erdma-mmap-cq\n\nproviders/erdma: Optimize CQ creation" }, { "commit": "1f9f73c28b006bcb4b37bfc594f12c173156c385", "tree": "a949ce91f2b5a6c9cfc7806a7a903cf71231cb77", "parents": [ "1d44ad6dbbda13066c4d0d3d64bce512b8884f5e" ], "author": { "name": "Cheng Xu", "email": "chengyou@linux.alibaba.com", "time": "Mon Aug 03 17:34:48 2026 +0800" }, "committer": { "name": "Cheng Xu", "email": "chengyou@linux.alibaba.com", "time": "Wed Aug 05 15:36:25 2026 +0800" }, "message": "providers/erdma: Initialize CQ doorbell record\n\nInitialize the CQ doorbell record after CQ creation succeeds so the CQ\nstarts from the initial state expected by hardware.\n\nFixes: 235333a1d072 (\"providers/erdma: Add userspace verbs implementation\")\nSigned-off-by: Cheng Xu \u003cchengyou@linux.alibaba.com\u003e\n" }, { "commit": "1d44ad6dbbda13066c4d0d3d64bce512b8884f5e", "tree": "12eeba2721729435df70fc69c2259fc7e5bb77ef", "parents": [ "d45834e0fe3ff1248e40d995f2f51c51739e6f1c" ], "author": { "name": "Cheng Xu", "email": "chengyou@linux.alibaba.com", "time": "Mon Aug 03 14:37:53 2026 +0800" }, "committer": { "name": "Cheng Xu", "email": "chengyou@linux.alibaba.com", "time": "Wed Aug 05 15:36:25 2026 +0800" }, "message": "providers/erdma: Allocate CQ buffer with mmap\n\nibv_dontfork_range() and ibv_dofork_range() operate on page-rounded\nranges. Use mmap() for the CQ buffer so the fork advice is applied to a\nseparate page-aligned mapping.\n\nmmap() also returns zeroed memory, so remove the explicit memset().\n\nFixes: 235333a1d072 (\"providers/erdma: Add userspace verbs implementation\")\nSigned-off-by: Cheng Xu \u003cchengyou@linux.alibaba.com\u003e\n" }, { "commit": "1de944a89faabd31806719172248263b1b986823", "tree": "bc98815d124b1594d63b971c4ad5debdb7bf3c93", "parents": [ "c0d3d33b174ce0ebed9185b31738b2d7c3a55e2d", "73a1f10e4a7b60e9d8fda0272ff7ffa20b098da7" ], "author": { "name": "Leon Romanovsky", "email": "leon@kernel.org", "time": "Wed Aug 05 10:36:17 2026 +0300" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Wed Aug 05 10:36:17 2026 +0300" }, "message": "Merge pull request #1787 from kalvdans/doc/reg-mr-errno\n\nverbs: Document that pointer-returning verbs set errno on failure" }, { "commit": "c0d3d33b174ce0ebed9185b31738b2d7c3a55e2d", "tree": "e257b94156b78162920228104e28d7e732e5d51b", "parents": [ "fbd292f40b159911936541b90c3c7489ec27d97d", "305f2f1d8739fe1d2915e153b4e90c53ec13dbf9" ], "author": { "name": "Leon Romanovsky", "email": "leon@kernel.org", "time": "Wed Aug 05 10:20:25 2026 +0300" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Wed Aug 05 10:20:25 2026 +0300" }, "message": "Merge pull request #1786 from amzn/efa_64_bit_req_id\n\nefa: Add support for 64-bit request IDs on post-send" }, { "commit": "73a1f10e4a7b60e9d8fda0272ff7ffa20b098da7", "tree": "e6f2cfbb34608646cd263b5dfc458206ab829fd6", "parents": [ "a484ffb1325f2b6a1745ebf9eb5670f288e0e8db" ], "author": { "name": "Christian Häggström", "email": "christian.haggstrom@sambanovasystems.com", "time": "Tue Aug 04 12:33:12 2026 +0000" }, "committer": { "name": "Christian Häggström", "email": "christian.haggstrom@sambanovasystems.com", "time": "Tue Aug 04 12:38:35 2026 +0000" }, "message": "verbs: Document errno behavior of MR fork/attr helpers\n\nAdd doc comments recording the errno contract of the internal helpers\non the memory-registration path, so callers relying on errno after a\nNULL return can see where it comes from:\n\n- ibv_dontfork_range() / ibv_dofork_range() (driver.h) and the\n underlying ibv_madvise_range(): a non-zero/-1 return sets errno to\n ENOMEM on tracking-node allocation failure, otherwise to the errno\n set by madvise(2).\n- fill_mr_init_attr_from_buf(): a -1 return sets errno to EINVAL.\n\nSigned-off-by: Christian Häggström \u003cchristian.haggstrom@sambanovasystems.com\u003e\n" }, { "commit": "fbd292f40b159911936541b90c3c7489ec27d97d", "tree": "19366f298647755a318c7d2bbdfbfda234353988", "parents": [ "e42b6840dc804ef928cbcb7fd2fff671cdce13be", "77f7355ced31f0e71672321a202fc68adc0e06bc" ], "author": { "name": "Leon Romanovsky", "email": "leon@kernel.org", "time": "Tue Aug 04 15:37:46 2026 +0300" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Tue Aug 04 15:37:46 2026 +0300" }, "message": "Merge pull request #1755 from mazorasaf/lib_dr\n\ninfiniband-diags: Add build_dr_path_to_lid and use it in iblinkinfo" }, { "commit": "a484ffb1325f2b6a1745ebf9eb5670f288e0e8db", "tree": "911a4175e905ef8c9bd880d41d62caa2ed2f2f07", "parents": [ "e42b6840dc804ef928cbcb7fd2fff671cdce13be" ], "author": { "name": "Christian Häggström", "email": "christian.haggstrom@sambanovasystems.com", "time": "Tue Aug 04 12:33:12 2026 +0000" }, "committer": { "name": "Christian Häggström", "email": "christian.haggstrom@sambanovasystems.com", "time": "Tue Aug 04 12:33:12 2026 +0000" }, "message": "verbs: Document that pointer-returning verbs set errno on failure\n\nThe RETURN VALUE sections of the pointer-returning verbs stated only\nthat NULL is returned on failure. Where errno was mentioned it described\nthe paired int-returning sibling (e.g. ibv_dealloc_pd, ibv_free_dm), not\nthe pointer verb itself; only ibv_import_dm documented that errno is set\non the NULL return.\n\nDocument the errno contract on all of these verbs for consistency with\nibv_import_dm and with the sibling int-returning verbs: ibv_reg_mr and\nfriends, ibv_alloc_pd, ibv_alloc_dm, ibv_reg_dm_mr, ibv_alloc_null_mr,\nibv_create_ah, ibv_create_ah_from_wc, ibv_create_comp_channel,\nibv_create_cq, ibv_create_cq_ex, ibv_create_qp, ibv_create_srq,\nibv_open_device, ibv_import_device, ibv_import_mr and ibv_import_pd. The\nibv_reg_mr path has set errno since commit f9e127a4bffa (\"verbs: Set\nmissing errno in ibv_cmd_reg_mr\").\n\nSigned-off-by: Christian Häggström \u003cchristian.haggstrom@sambanovasystems.com\u003e\n" }, { "commit": "d7cdbe1674c72518b6f26d459e89586e80075d43", "tree": "0d62e94e3603f36e2e588ad862fe002e2c0152d6", "parents": [ "4e706e17448e98b9fe2772284586429ce4daca40" ], "author": { "name": "Allen Hubbe", "email": "allen.hubbe@amd.com", "time": "Thu Mar 26 14:34:46 2026 +0530" }, "committer": { "name": "Abhijit Gangurde", "email": "abhijit.gangurde@amd.com", "time": "Tue Aug 04 18:01:19 2026 +0530" }, "message": "tests: test PHC completion time stamp\n\nAdd a test for completion time stamp.\n\nValidate the wall clock time by opening the PTP hardware clock device\nnode to read the current time and compare it to the wall clock\ncompletion time stamps. Expect that completion time stamps are within\nthe past one second of the current PHC time at the end of the test.\n\nSigned-off-by: Allen Hubbe \u003callen.hubbe@amd.com\u003e\nSigned-off-by: Abhijit Gangurde \u003cabhijit.gangurde@amd.com\u003e\n" }, { "commit": "4e706e17448e98b9fe2772284586429ce4daca40", "tree": "755a79e8688f918ee164b2dd59f1ef3a8bc2ff5d", "parents": [ "8a6fdc2a24d4004242cbd0a0f7edf95eaea011a5" ], "author": { "name": "Abhijit Gangurde", "email": "abhijit.gangurde@amd.com", "time": "Thu Jun 04 15:19:39 2026 +0530" }, "committer": { "name": "Abhijit Gangurde", "email": "abhijit.gangurde@amd.com", "time": "Tue Aug 04 18:01:19 2026 +0530" }, "message": "mlx5: Use common ib_uverbs_clock_info for clock info page\n\nMigrate to the common ib_uverbs_clock_info struct introduced in the\nkernel headers.\n\nSigned-off-by: Abhijit Gangurde \u003cabhijit.gangurde@amd.com\u003e\n" }, { "commit": "8a6fdc2a24d4004242cbd0a0f7edf95eaea011a5", "tree": "df8b32ef56977dced1ad7fe7e2278371a1c641e6", "parents": [ "17d3dccccb8326f4a552ebf95ba3c9c4e5f208c7" ], "author": { "name": "Abhijit Gangurde", "email": "abhijit.gangurde@amd.com", "time": "Thu Mar 26 14:16:34 2026 +0530" }, "committer": { "name": "Abhijit Gangurde", "email": "abhijit.gangurde@amd.com", "time": "Tue Aug 04 18:01:19 2026 +0530" }, "message": "ionic: Add support for PHC timestamping\n\nSupport IBV_WC_EX_WITH_COMPLETION_TIMESTAMP and\nIBV_WC_EX_WITH_COMPLETION_TIMESTAMP_WALLCLOCK.\n\nModify the polling path to extract timestamps from the CQE. For Send Queue\ncompletions, cache the timestamp in the request metadata (`sq_meta`) which\nallows the driver to propagate the correct hardware timestamp to all Work\nCompletions covered by a coalesced (MSN) completion event.\n\nUpdate `start_poll` to process one completion at a time and store the\ncurrent timestamp in the `vcq` context. This ensures that the\n`read_completion_ts` and `read_completion_wallclock_ns` accessors return\nthe correct value for the specific Work Completion currently being inspected.\n\nSigned-off-by: Allen Hubbe \u003callen.hubbe@amd.com\u003e\nSigned-off-by: Abhijit Gangurde \u003cabhijit.gangurde@amd.com\u003e\n" }, { "commit": "17d3dccccb8326f4a552ebf95ba3c9c4e5f208c7", "tree": "72b810b7e22d99fd0339105c30cb061564ccbf78", "parents": [ "e42b6840dc804ef928cbcb7fd2fff671cdce13be" ], "author": { "name": "Abhijit Gangurde", "email": "abhijit.gangurde@amd.com", "time": "Wed Mar 25 12:01:30 2026 +0530" }, "committer": { "name": "Abhijit Gangurde", "email": "abhijit.gangurde@amd.com", "time": "Tue Aug 04 18:01:19 2026 +0530" }, "message": "ionic: map PHC state page for user space access\n\nmap the PHC page to allow applications to access hardware\ntimestamp information.\n\nSigned-off-by: Allen Hubbe \u003callen.hubbe@amd.com\u003e\nSigned-off-by: Abhijit Gangurde \u003cabhijit.gangurde@amd.com\u003e\n" }, { "commit": "77f7355ced31f0e71672321a202fc68adc0e06bc", "tree": "2275f1e12b66725085d6b912736f6255bd1da5b2", "parents": [ "a7453f881692a8241740ed639a5cbc0b83d0897f" ], "author": { "name": "Asaf Mazor", "email": "amazor@nvidia.com", "time": "Tue Jun 09 12:41:57 2026 +0300" }, "committer": { "name": "Asaf Mazor", "email": "amazor@nvidia.com", "time": "Tue Aug 04 15:07:30 2026 +0300" }, "message": "infiniband-diags: Add build_dr_path_to_lid and use it in iblinkinfo\n\nAdd build_dr_path_to_lid() to the ibdiags_tools library so all\ninfiniband-diags tools can build a direct route (DR) path to a\ndestination LID. It follows switch Linear Forwarding Tables via live\nSMP queries.\n\nThis is needed for XDR: SMP via LID is not guaranteed to work in XDR\nfabrics, so utilities must be able to build and walk a direct route to\nreach a destination LID.\n\nUse it in iblinkinfo: when a start point is given via -S/-G, resolve the\nGUID to a LID and build a DR path to it so the partial scan starts from a\nDR-addressed portid instead of relying on LID routing.\n\nSigned-off-by: Asaf Mazor \u003camazor@nvidia.com\u003e\n" }, { "commit": "18e5cdf3b2eafade3f8a77a074d9ab76cec0c4af", "tree": "70446e5a4b09e5e42a8c31f13e448328c526f64b", "parents": [ "e42b6840dc804ef928cbcb7fd2fff671cdce13be" ], "author": { "name": "Gleb Popov", "email": "6yearold@gmail.com", "time": "Thu Jun 18 13:05:29 2026 +0300" }, "committer": { "name": "Gleb Popov", "email": "6yearold@gmail.com", "time": "Tue Aug 04 15:06:16 2026 +0300" }, "message": "util/udma_barrier.h: Add barriers support for Elbrus2000\n\nE2K compilers provide a x86_64-compatible intrinsics that expand into native\ninstructions. Implement barries support using __builtin_ia32_{l,m,s}fence()\ninstead of the inline assembly for better readability and portability between\ne2k hardware.\n\nSigned-off-by: Gleb Popov \u003c6yearold@gmail.com\u003e\n" }, { "commit": "e42b6840dc804ef928cbcb7fd2fff671cdce13be", "tree": "a7200f801b33137da384c7e6020fc2d99f5e9fb1", "parents": [ "d22acee7ca4a01c6e56e6c3f512bf03a87fb62ca", "0e0b5574f61f3b6dab69d999b689f75d37feee73" ], "author": { "name": "Leon Romanovsky", "email": "leon@kernel.org", "time": "Tue Aug 04 14:21:22 2026 +0300" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Tue Aug 04 14:21:22 2026 +0300" }, "message": "Merge pull request #1781 from yishaih/mlx5_misc\n\nmlx5: Misc. items" }, { "commit": "d22acee7ca4a01c6e56e6c3f512bf03a87fb62ca", "tree": "8872fdcb7f90099feb313d1a69b5529dd084c0ea", "parents": [ "4cada9238caabbbd5db85eb406ff1f35841cf156", "b538ecb60cd16d0e22af6e0942e834441c30ba60" ], "author": { "name": "Leon Romanovsky", "email": "leon@kernel.org", "time": "Tue Aug 04 14:19:51 2026 +0300" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Tue Aug 04 14:19:51 2026 +0300" }, "message": "Merge pull request #1783 from abhijitG-xlnx/movdir64\n\nionic: Fix have_movdir64b() cpuid max-leaf query" }, { "commit": "305f2f1d8739fe1d2915e153b4e90c53ec13dbf9", "tree": "671d1a6089aca33e8676a5cd3684069b8853ee9e", "parents": [ "f655e05dea2d76720519bafaceff3a64f2014f8e" ], "author": { "name": "Yonatan Nachum", "email": "ynachum@amazon.com", "time": "Tue Jul 07 16:30:46 2026 +0000" }, "committer": { "name": "Yonatan Nachum", "email": "ynachum@amazon.com", "time": "Tue Aug 04 08:59:18 2026 +0000" }, "message": "efa: Expose 64-bit request ID capability in query QP DV\n\nExpose the capability to post WRs with 64-bit request IDs directly\nwithout translation on query QP DV.\n\nSigned-off-by: Yonatan Nachum \u003cynachum@amazon.com\u003e\n" }, { "commit": "f655e05dea2d76720519bafaceff3a64f2014f8e", "tree": "58d84b456f6bc3bcd24fb146cd7cf6b88e6b6ced", "parents": [ "668d06863f43c6f0a5177bb9093c83ce53756666" ], "author": { "name": "Yonatan Nachum", "email": "ynachum@amazon.com", "time": "Tue Jul 07 15:04:41 2026 +0000" }, "committer": { "name": "Yonatan Nachum", "email": "ynachum@amazon.com", "time": "Tue Aug 04 08:59:18 2026 +0000" }, "message": "efa: Add QP support for 64-bit SQ WR request IDs\n\nAdd support for creating QPs that use 64-bit SQ request IDs.\nEnable 64-bit SQ request IDs automatically if the device support it.\nWhen enabled, the QP doesn\u0027t allocate a WR ID pool to translate 64-bit\nIDs to 16-bit IDs and place the 64-bit ID directly in the WR meta\ndescriptor.\n\nSigned-off-by: Yonatan Nachum \u003cynachum@amazon.com\u003e\n" }, { "commit": "668d06863f43c6f0a5177bb9093c83ce53756666", "tree": "a0a6a575209867fc37401658e94d4fb10eb556bc", "parents": [ "d14260d2e27cfc67beb6c962eca5719a8384f238" ], "author": { "name": "Yonatan Nachum", "email": "ynachum@amazon.com", "time": "Tue Jul 07 14:56:06 2026 +0000" }, "committer": { "name": "Yonatan Nachum", "email": "ynachum@amazon.com", "time": "Tue Aug 04 08:59:18 2026 +0000" }, "message": "efa: Add CQ support for 64-bit request ID completions\n\nAdd support for creating CQs that support 64-bit completions. Currently\nif the device reported support for 64-bit requests IDs, it is enabled\nautomatically for all CQs created on the device. On CQ poll path, if the\nQP that the CQE belong to is configured with 64-bit SQ request ID, fetch\nthe request ID from the CQE instead of the WR ID pool.\n\nSigned-off-by: Yonatan Nachum \u003cynachum@amazon.com\u003e\n" }, { "commit": "d14260d2e27cfc67beb6c962eca5719a8384f238", "tree": "c781577eb15cb1aa7d7c976d116d7b7f98001d40", "parents": [ "4cada9238caabbbd5db85eb406ff1f35841cf156" ], "author": { "name": "Yonatan Nachum", "email": "ynachum@amazon.com", "time": "Tue Jul 28 10:17:59 2026 +0000" }, "committer": { "name": "Yonatan Nachum", "email": "ynachum@amazon.com", "time": "Tue Aug 04 08:59:18 2026 +0000" }, "message": "Update kernel headers\n\nTo commit: 524381ef281b (\"RDMA/efa: Expose 64-bit send WR ID support to\nuserspace\").\n\nSigned-off-by: Yonatan Nachum \u003cynachum@amazon.com\u003e\n" }, { "commit": "4cada9238caabbbd5db85eb406ff1f35841cf156", "tree": "d0b519ea211718b35f8b91ba6975d34354792eed", "parents": [ "11a16424478a9fafd7ff77ad36aee3d8a7bc498b", "20342236592663c95230ddad725888dcb85335f3" ], "author": { "name": "Leon Romanovsky", "email": "leon@kernel.org", "time": "Tue Aug 04 11:54:50 2026 +0300" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Tue Aug 04 11:54:50 2026 +0300" }, "message": "Merge pull request #1782 from ShacharKagan/fix-cuda13-s2c-read\n\ntests: Fix WR leak, CUDA 13, and scatter-to-CQE" }, { "commit": "11a16424478a9fafd7ff77ad36aee3d8a7bc498b", "tree": "577471f6f2bf5ed6cc5cafb395e49fd82a52c8b5", "parents": [ "d45834e0fe3ff1248e40d995f2f51c51739e6f1c", "f23d5fe12cbee88734d205cd9f7d447928120c26" ], "author": { "name": "Leon Romanovsky", "email": "leon@kernel.org", "time": "Tue Aug 04 11:48:48 2026 +0300" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Tue Aug 04 11:48:48 2026 +0300" }, "message": "Merge pull request #1701 from amzn/comp-counters\n\nIntroduce Completion Counters verbs" }, { "commit": "b538ecb60cd16d0e22af6e0942e834441c30ba60", "tree": "74a8033c093f516e4b0b96490831c4ac64b767ed", "parents": [ "d45834e0fe3ff1248e40d995f2f51c51739e6f1c" ], "author": { "name": "Abhijit Gangurde", "email": "abhijit.gangurde@amd.com", "time": "Fri Jul 31 13:47:49 2026 +0530" }, "committer": { "name": "Abhijit Gangurde", "email": "abhijit.gangurde@amd.com", "time": "Fri Jul 31 13:55:19 2026 +0530" }, "message": "ionic: Fix have_movdir64b() cpuid max-leaf query\n\nuse eax\u003d0 to query the max supported leaf, not eax\u003d7 which\nexecutes leaf 7 directly and returns an unrelated value for\nthe support check.\n\nFixes: 6d82ac7ba (\"ionic: Add ionic provider\")\nSigned-off-by: Abhijit Gangurde \u003cabhijit.gangurde@amd.com\u003e\n" }, { "commit": "20342236592663c95230ddad725888dcb85335f3", "tree": "57b63bdb36218529112522b38621e7465101e893", "parents": [ "352724b54d87c2a2a266aa85c20397457b7baff0" ], "author": { "name": "Linoy Ganti", "email": "lganti@nvidia.com", "time": "Wed May 20 10:35:24 2026 +0300" }, "committer": { "name": "Shachar Kagan", "email": "skagan@nvidia.com", "time": "Thu Jul 30 11:28:17 2026 +0300" }, "message": "tests: Add DV CQ RDMA_READ scatter-to-CQE test\n\nAdd test_dv_cq_rdma_read_small_msg_128_cqe to exercise requestor-side\nscatter-to-CQE with mlx5dv 128-byte CQEs and payloads below 64 bytes\n(16/40/60), covering INLINE_SCATTER_32 and INLINE_SCATTER_64 paths.\n\nGeneralize tests/utils.py helpers used by the new test: add sq_sig_all\nto create_qp_ex().\n\nSigned-off-by: Linoy Ganti \u003clganti@nvidia.com\u003e\nSigned-off-by: Shachar Kagan \u003cskagan@nvidia.com\u003e\n" }, { "commit": "352724b54d87c2a2a266aa85c20397457b7baff0", "tree": "c554734c29ad594e313f3cc55a1a201af76206ed", "parents": [ "829cd7252cea884dbad32c0c68b20dd1d59d449f" ], "author": { "name": "Daniel Hayon", "email": "dhayon@nvidia.com", "time": "Wed Jun 24 15:21:45 2026 +0300" }, "committer": { "name": "Shachar Kagan", "email": "skagan@nvidia.com", "time": "Thu Jul 30 11:28:17 2026 +0300" }, "message": "tests: Add cuda-python 13 support\n\ncuda-python 13 relocates driver/runtime/nvrtc under cuda.bindings and\nchanges the cuCtxCreate() signature. Probe the installed layout and\nselect the correct import path and call form so GPU tests work on\nboth cuda-python 12 and 13.\n\nSigned-off-by: Daniel Hayon \u003cdhayon@nvidia.com\u003e\nSigned-off-by: Shachar Kagan \u003cskagan@nvidia.com\u003e\n" }, { "commit": "829cd7252cea884dbad32c0c68b20dd1d59d449f", "tree": "00293b87b1b6d333ef0d862051185a07f5d42485", "parents": [ "d45834e0fe3ff1248e40d995f2f51c51739e6f1c" ], "author": { "name": "Maxim Chicherin", "email": "maximc@nvidia.com", "time": "Sun Jul 12 14:12:21 2026 +0300" }, "committer": { "name": "Shachar Kagan", "email": "skagan@nvidia.com", "time": "Thu Jul 30 11:28:17 2026 +0300" }, "message": "pyverbs: Fix WR destructor typo leaking SGE buffers\n\nWork-request helper objects never ran their finalizers because the\nCython destructor was misspelled, so malloc\u0027d scatter-gather buffers\nwere leaked on every GC cycle. Rename to the correct special method\nso cleanup runs automatically.\n\nSigned-off-by: Maxim Chicherin \u003cmaximc@nvidia.com\u003e\nSigned-off-by: Shachar Kagan \u003cskagan@nvidia.com\u003e\n" }, { "commit": "0e0b5574f61f3b6dab69d999b689f75d37feee73", "tree": "e863267cae33a96a6fd6a538dc0f0fabf5ede4ec", "parents": [ "0819419e791dd9cf9e145353fd97a09c43632f9f" ], "author": { "name": "Michael Gur", "email": "michaelgur@nvidia.com", "time": "Wed Jul 29 13:31:40 2026 +0300" }, "committer": { "name": "Yishai Hadas", "email": "yishaih@nvidia.com", "time": "Wed Jul 29 18:49:21 2026 +0300" }, "message": "mlx5: Add CX10 Family PCI IDs\n\nAdd both ConnectX-10 and ConnectX-10 NVLink-C2C to the list of supported\nPCI devices.\n\nSigned-off-by: Michael Gur \u003cmichaelgur@nvidia.com\u003e\nSigned-off-by: Yishai Hadas \u003cyishaih@nvidia.com\u003e\n" }, { "commit": "0819419e791dd9cf9e145353fd97a09c43632f9f", "tree": "0700400d95517af579c176ca3bf6583b9feb9956", "parents": [ "d45834e0fe3ff1248e40d995f2f51c51739e6f1c" ], "author": { "name": "Michael Gur", "email": "michaelgur@nvidia.com", "time": "Tue Jul 07 11:37:50 2026 +0300" }, "committer": { "name": "Yishai Hadas", "email": "yishaih@nvidia.com", "time": "Wed Jul 29 18:48:13 2026 +0300" }, "message": "mlx5: Fix clock update EBUSY error flow\n\nmlx5dv_get_clock_info() reads clock data published by the kernel, and is\ninherently racy with kernel clock updates. This race cannot be\neliminated; EBUSY will always be possible at some rate when wallclock\ntimestamping is used with extended CQ polling.\n\nAdd documentation for the EBUSY errno so callers know the expected\nbehavior: EBUSY indicates a CQE is available but the wallclock read\nfailed. Callers are expected to retry polling the CQ. Providers must not\nconsume the CQE on EBUSY and must leave the CQ in a valid state for the\nnext poll attempt.\n\nPrior to this fix, the error was returned after the CQE was parsed, the\nconsumer index incremented, and WQ/SRQ modified. This left the CQ in an\ninconsistent state: the CQE was silently lost and the CQ doorbell was\nnever updated, making recovery impossible regardless of retries.\n\nFix by moving the clock update before CQE parsing. At that point only\nthe consumer index has been advanced, so on failure it can be safely\nreverted and EBUSY returned with the CQ intact.\n\nSince EBUSY was previously undocumented and the error path was broken,\nno existing user could have relied on this behavior. This fix is\ntherefore not a behavior change in practice.\n\nFixes: 4745c8079a86 (\"mlx5: Implement read_completion_wallclock_ns\")\nSigned-off-by: Michael Gur \u003cmichaelgur@nvidia.com\u003e\nSigned-off-by: Yishai Hadas \u003cyishaih@nvidia.com\u003e\n" }, { "commit": "f23d5fe12cbee88734d205cd9f7d447928120c26", "tree": "577471f6f2bf5ed6cc5cafb395e49fd82a52c8b5", "parents": [ "d06ef970bc8200bc86448290251bc902e4a2fede" ], "author": { "name": "Michael Margolin", "email": "mrgolin@amazon.com", "time": "Thu Jul 23 16:23:18 2026 +0000" }, "committer": { "name": "Michael Margolin", "email": "mrgolin@amazon.com", "time": "Thu Jul 23 16:26:07 2026 +0000" }, "message": "pyverbs: Add Completion Counters support\n\nExpose the Completion Counters verbs API through pyverbs.\n\nAdd CompCntr class with set, set_err, inc, inc_err, read and read_err\nmethods. Add CompCntrInitAttr and CompCntrAttachAttr helper classes.\nAdd attach_comp_cntr method to the QP class. Expose supported\ncapabilities using query_comp_cntr_caps device method.\n\nAdditionally add pyverbs interface for creating EFA Completion Counters\nwith external memory.\n\nSigned-off-by: Michael Margolin \u003cmrgolin@amazon.com\u003e\n" }, { "commit": "d06ef970bc8200bc86448290251bc902e4a2fede", "tree": "f2daec3d8f815613afe177b68edcb4bb4c01f934", "parents": [ "2b17ca2441e9b239df8d9233b72b3bd1fd6714af" ], "author": { "name": "Michael Margolin", "email": "mrgolin@amazon.com", "time": "Thu Jul 23 08:01:23 2026 +0000" }, "committer": { "name": "Michael Margolin", "email": "mrgolin@amazon.com", "time": "Thu Jul 23 16:26:07 2026 +0000" }, "message": "efa: Add Completion Counters support\n\nImplement completion counters for the EFA provider. Each counter\nobject has two event counters (success and error) with set, inc, and\nread operations. Counter values are accessed directly from userspace\nthrough mapped memory.\n\nAdd efadv_create_comp_cntr() for extended creation with external\nmemory options. Buffer memory is described to the kernel via\nib_uverbs_buffer_desc struct passed as a driver-specific ioctl\nattribute. Three modes are supported per counter: user-supplied VA,\nuser-supplied dmabuf, or provider-internal memory.\n\nReviewed-by: Yonatan Nachum \u003cynachum@amazon.com\u003e\nSigned-off-by: Michael Margolin \u003cmrgolin@amazon.com\u003e\n" }, { "commit": "2b17ca2441e9b239df8d9233b72b3bd1fd6714af", "tree": "79a9b4a755ad3a82b37f02519754d26da108cbfb", "parents": [ "6739d1ed6154afc8e9770850d2431b2d71d1513a" ], "author": { "name": "Michael Margolin", "email": "mrgolin@amazon.com", "time": "Thu Jul 23 08:01:23 2026 +0000" }, "committer": { "name": "Michael Margolin", "email": "mrgolin@amazon.com", "time": "Thu Jul 23 16:26:07 2026 +0000" }, "message": "libibverbs: Add common infrastructure for Completion Counters verbs\n\nAdd kernel ioctl interface, provider ops, command helpers, and public\nAPI dispatch to enable providers to implement the Completion Counters\nverbs introduced in the previous commit.\n\nReviewed-by: Daniel Kinsbursky \u003cdkinsb@amazon.com\u003e\nSigned-off-by: Michael Margolin \u003cmrgolin@amazon.com\u003e\n" }, { "commit": "6739d1ed6154afc8e9770850d2431b2d71d1513a", "tree": "32f0809cc5caab539d24aeabb896062a75f8b2de", "parents": [ "18c6c8f95f7877deb18bea220eee3ffbca9d922b" ], "author": { "name": "Michael Margolin", "email": "mrgolin@amazon.com", "time": "Thu Jul 23 08:01:14 2026 +0000" }, "committer": { "name": "Michael Margolin", "email": "mrgolin@amazon.com", "time": "Thu Jul 23 16:26:07 2026 +0000" }, "message": "Update kernel headers\n\nTo commit: 9b66c9af7172 (\"RDMA/bnxt_re: Clear VM_MAYWRITE on DBR/toggle\npage mmap\").\n\nSigned-off-by: Michael Margolin \u003cmrgolin@amazon.com\u003e\n" }, { "commit": "18c6c8f95f7877deb18bea220eee3ffbca9d922b", "tree": "386e210cf47862818b8b06748effbf7952490385", "parents": [ "d45834e0fe3ff1248e40d995f2f51c51739e6f1c" ], "author": { "name": "Michael Margolin", "email": "mrgolin@amazon.com", "time": "Thu Jul 23 07:38:30 2026 +0000" }, "committer": { "name": "Michael Margolin", "email": "mrgolin@amazon.com", "time": "Thu Jul 23 16:26:07 2026 +0000" }, "message": "libibverbs: Introduce Completion Counters verbs\n\nExtend verbs interface to support Completion Counters that can be seen\nas a light-weight alternative to polling CQ. A completion counter object\nseparately counts successful and error completions, can be attached to\nmultiple QPs and be configured to count completions of a subset of\noperation types. This is especially useful for batch or credit based\nworkloads running on accelerators but can serve many other types of\napplications as well.\n\nExpose supported number of completion counters through query device\nextended verb.\n\nReviewed-by: Daniel Kinsbursky \u003cdkinsb@amazon.com\u003e\nReviewed-by: Yonatan Nachum \u003cynachum@amazon.com\u003e\nSigned-off-by: Michael Margolin \u003cmrgolin@amazon.com\u003e\n" }, { "commit": "d45834e0fe3ff1248e40d995f2f51c51739e6f1c", "tree": "e50a1a4f7eeb90608bbd7dc8042bd5b53dce0eff", "parents": [ "b937d019641929ecac0b0af3d278bd1e5d05267a", "c8fe8e7df17498ef3b0a150b83faf1d275f2e688" ], "author": { "name": "Yishai Hadas", "email": "yishaih@mellanox.com", "time": "Wed Jul 22 11:03:09 2026 +0300" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Wed Jul 22 11:03:09 2026 +0300" }, "message": "Merge pull request #1770 from jpirko/wip_ibv_buf_fd\n\nlibibverbs: Add DMA-buf fd export for ibv_buf" }, { "commit": "b937d019641929ecac0b0af3d278bd1e5d05267a", "tree": "de241fcd12f104acf8cdd318ea691c6070f5da50", "parents": [ "58b0316b7cab0b23783d2dfc5dbc5c58daca2964", "3c78754917dbf54233fadf3b49d2eb920d2669ff" ], "author": { "name": "Leon Romanovsky", "email": "leon@kernel.org", "time": "Tue Jul 21 13:19:32 2026 +0300" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Tue Jul 21 13:19:32 2026 +0300" }, "message": "Merge pull request #1774 from abhijitG-xlnx/qp_attr_ex\n\nionic: Add IBV_QP_INIT_ATTR_SEND_OPS_FLAGS support for create_qp_ex" }, { "commit": "58b0316b7cab0b23783d2dfc5dbc5c58daca2964", "tree": "fc361e78c63ae460f0bda95314bea307d86a7cdc", "parents": [ "41f40ac8a01d005729b8af9d272fde3c46443cb5", "96b5621ee181c1d80ae0262c5cc14d98f031f921" ], "author": { "name": "Leon Romanovsky", "email": "leon@kernel.org", "time": "Tue Jul 21 13:09:58 2026 +0300" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Tue Jul 21 13:09:58 2026 +0300" }, "message": "Merge pull request #1776 from BatshevaBlack/rsocket_epoll\n\nRsocket epoll" }, { "commit": "41f40ac8a01d005729b8af9d272fde3c46443cb5", "tree": "9f5bc496dbe362023ca3968a64feabb4aa5c6b78", "parents": [ "5a8b665562077b85ad962cbe2b4486195e8685bf", "9a645e432cbe6bcefb77160bb13c9aa9a291a752" ], "author": { "name": "Yishai Hadas", "email": "yishaih@mellanox.com", "time": "Tue Jul 21 10:53:48 2026 +0300" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Tue Jul 21 10:53:48 2026 +0300" }, "message": "Merge pull request #1769 from yishaih/verbs_misc\n\nShow the effective port bandwidth as part of ibv_devinfo and ibstat" }, { "commit": "96b5621ee181c1d80ae0262c5cc14d98f031f921", "tree": "49c70d3c9c4dc68a6c1dcb0442bc0a0fbfecbc4a", "parents": [ "c96619715fbdff9cc91ce48530b73bed632d0db1" ], "author": { "name": "Batsheva Black", "email": "bblack@nvidia.com", "time": "Mon Jul 20 21:47:36 2026 +0300" }, "committer": { "name": "bblack", "email": "bblack@nvidia.com", "time": "Mon Jul 20 21:47:36 2026 +0300" }, "message": "librdmacm: Add epoll support to librspreload\n\nIntercept epoll create, control, and wait operations and translate preload\nfile descriptors to their internal repoll descriptors. Register created\nepoll descriptors so close is routed through rclose for proper cleanup.\n\nSigned-off-by: Batsheva Black \u003cbblack@nvidia.com\u003e\n" }, { "commit": "c96619715fbdff9cc91ce48530b73bed632d0db1", "tree": "61c7a851ceb50444d04703953de86ad9c2c4a7d4", "parents": [ "0b10cda9a56f2d20785026f56aab21cd9955dd87" ], "author": { "name": "Batsheva Black", "email": "bblack@nvidia.com", "time": "Mon Jul 20 21:47:13 2026 +0300" }, "committer": { "name": "bblack", "email": "bblack@nvidia.com", "time": "Mon Jul 20 21:47:13 2026 +0300" }, "message": "librdmacm: Add repoll create, control, and wait support\n\nAdd rsocket equivalents for epoll create, control, and wait operations,\nincluding monitor thread synchronization and descriptor lifecycle\nmanagement, exported through librdmacm.\n\nSigned-off-by: Batsheva Black \u003cbblack@nvidia.com\u003e\n" }, { "commit": "0b10cda9a56f2d20785026f56aab21cd9955dd87", "tree": "4b349afca39384e364876eb3d4ac9c33c5bca738", "parents": [ "7f67278726e4b9442d0fad2785cd93c8304e59e2" ], "author": { "name": "Batsheva Black", "email": "bblack@nvidia.com", "time": "Wed Jul 15 08:33:39 2026 +0300" }, "committer": { "name": "bblack", "email": "bblack@nvidia.com", "time": "Mon Jul 20 21:41:55 2026 +0300" }, "message": "librdmacm: cm_svc: don\u0027t dispatch stale CM events after add/remove\n\ncm_svc_run() captures CM channel revents from poll(), then processes any\npending control-socket command via cm_svc_process_sock(). An RS_SVC_REM_CM\nremoves the rsocket from the svc set, after which the app thread\u0027s rclose()\nproceeds to rs_free() concurrently. The svc thread would then walk the CM\ndispatch loop using the pre-remove revents and call rs_handle_cm_event() on\na freed rsocket, dereferencing rs-\u003ecm_id (NULL on reused memory) and\ncrashing in ucma_complete(). This is a use-after-free hit under open/close\nstress (e.g. redis-benchmark via librspreload), and affects both connect_svc\nand listen_svc, which share cm_svc_run().\n\nAfter handling the control socket, continue back to poll() instead of\ndispatching the now-stale CM revents. Unread CM events keep the fd readable\nand will re-fire on the next poll(), so no event is lost. Also guard\nrs_handle_cm_event() against a NULL cm_id as defense-in-depth.\n\nSigned-off-by: Batsheva Black \u003cbblack@nvidia.com\u003e\n" }, { "commit": "7f67278726e4b9442d0fad2785cd93c8304e59e2", "tree": "fdebccd6f6299deccf4967a4dd783bb3cfe40a5e", "parents": [ "a5694c4482ea41af8c9c71929fface1f3571e57f" ], "author": { "name": "Batsheva Black", "email": "bblack@nvidia.com", "time": "Wed Jul 08 20:23:50 2026 +0300" }, "committer": { "name": "bblack", "email": "bblack@nvidia.com", "time": "Mon Jul 20 21:41:55 2026 +0300" }, "message": "librdmacm: reject negative indexes in idm_lookup\n\nNegative fd values were not rejected and could index before the idm\narray. Fold the fd \u003e\u003d 0 check into idm_lookup so callers need not\nduplicate it.\n\nSigned-off-by: Batsheva Black \u003cbblack@nvidia.com\u003e\n" }, { "commit": "a5694c4482ea41af8c9c71929fface1f3571e57f", "tree": "0eebec92114fb414d4800a49aa13154a96f7c436", "parents": [ "4be917c7cc83614e7b3186dac6984bfd258c5d62" ], "author": { "name": "Batsheva Black", "email": "bblack@nvidia.com", "time": "Thu Apr 23 13:25:17 2026 +0300" }, "committer": { "name": "bblack", "email": "bblack@nvidia.com", "time": "Mon Jul 20 21:41:55 2026 +0300" }, "message": "buildlib: Fix typos in sparse stdatomic.h compare-exchange macro\n\nThe atomic_compare_exchange_strong_explicit macro used \u0027r\u0027 instead\nof \u0027__r\u0027 and \u0027__val\u0027 instead of \u0027__v\u0027, causing build failures under\nsparse analysis when code uses atomic_compare_exchange_strong/weak.\n\nSigned-off-by: Batsheva Black \u003cbblack@nvidia.com\u003e\n" }, { "commit": "3c78754917dbf54233fadf3b49d2eb920d2669ff", "tree": "e9cfd637e09972e95bc30a9a0d9a7556c52b7c44", "parents": [ "5a8b665562077b85ad962cbe2b4486195e8685bf" ], "author": { "name": "Allen Hubbe", "email": "allen.hubbe@amd.com", "time": "Wed Jul 15 19:03:12 2026 +0530" }, "committer": { "name": "Abhijit Gangurde", "email": "abhijit.gangurde@amd.com", "time": "Fri Jul 17 16:58:23 2026 +0530" }, "message": "ionic: Add IBV_QP_INIT_ATTR_SEND_OPS_FLAGS support for create_qp_ex\n\nValidate comp_mask and send_ops_flags in create_qp_ex and\nimplement the ibv_qp_ex interface for RC QPs with builder and setter\ncallbacks for all supported send operations: RDMA read/write, send,\natomics, local invalidate, bind MW, and send with invalidate.\n\nSigned-off-by: Allen Hubbe \u003callen.hubbe@amd.com\u003e\nSigned-off-by: Abhijit Gangurde \u003cabhijit.gangurde@amd.com\u003e\n" }, { "commit": "c8fe8e7df17498ef3b0a150b83faf1d275f2e688", "tree": "304ad2ab0aabb8d21a45c6246c2e084973192c45", "parents": [ "7f18b0e50f022bfd5a6d08cd87320fc3be343e24" ], "author": { "name": "Jiri Pirko", "email": "jiri@nvidia.com", "time": "Thu Jul 02 15:32:54 2026 +0200" }, "committer": { "name": "Jiri Pirko", "email": "jiri@nvidia.com", "time": "Tue Jul 14 16:41:25 2026 +0200" }, "message": "tests: Cover DMA-buf fd export for ibv_buf\n\nAdd buffer API checks for successful fd export on DMA-buf backed\nbuffers and ENODATA on ordinary memory buffers.\n\nSigned-off-by: Jiri Pirko \u003cjiri@nvidia.com\u003e\n" }, { "commit": "7f18b0e50f022bfd5a6d08cd87320fc3be343e24", "tree": "e15595af578c0546e0e430ddc7680f0d864cc246", "parents": [ "64bc03b94f33e866564afbacbcede8e57ab8817b" ], "author": { "name": "Jiri Pirko", "email": "jiri@nvidia.com", "time": "Thu Jul 02 15:32:54 2026 +0200" }, "committer": { "name": "Jiri Pirko", "email": "jiri@nvidia.com", "time": "Tue Jul 14 16:41:25 2026 +0200" }, "message": "pyverbs: Add DMA-buf fd export for Buf\n\nAllow Python users to retrieve a caller-owned DMA-buf file\ndescriptor from a Buf\u0027s backing memory.\n\nSigned-off-by: Jiri Pirko \u003cjiri@nvidia.com\u003e\n" }, { "commit": "64bc03b94f33e866564afbacbcede8e57ab8817b", "tree": "d3110e3d162b18ddd612abb69ce28284ea7349f8", "parents": [ "5a8b665562077b85ad962cbe2b4486195e8685bf" ], "author": { "name": "Jiri Pirko", "email": "jiri@nvidia.com", "time": "Thu Jul 02 15:32:54 2026 +0200" }, "committer": { "name": "Jiri Pirko", "email": "jiri@nvidia.com", "time": "Tue Jul 14 16:41:25 2026 +0200" }, "message": "libibverbs: Add DMA-buf fd export for ibv_buf\n\nAdd ibv_export_buf_dmabuf_fd() so applications can obtain a\ncaller-owned DMA-buf file descriptor from provider-aware buffers that\nare backed by DMA-buf memory.\n\nSigned-off-by: Jiri Pirko \u003cjiri@nvidia.com\u003e\n" }, { "commit": "9a645e432cbe6bcefb77160bb13c9aa9a291a752", "tree": "9f5bc496dbe362023ca3968a64feabb4aa5c6b78", "parents": [ "b8675bad53923af639aa89dfcd29baa5875f2767" ], "author": { "name": "Or Har-Toov", "email": "ohartoov@nvidia.com", "time": "Tue Jun 16 16:43:16 2026 +0300" }, "committer": { "name": "Yishai Hadas", "email": "yishaih@nvidia.com", "time": "Sun Jul 12 15:21:39 2026 +0300" }, "message": "ibstat: show effective port bandwidth using ibv_query_port_speed()\n\nAdd an \u0027Effective speed\u0027 line to ibstat port output, populated via\nibv_query_port_speed(). Unlike the existing rate field which reflects\nthe PTYS speed, this verb returns the actual effective bandwidth\naccounting for LAG aggregation and PCIe constraints. The line is\nsilently omitted if the provider does not support the verb.\n\nSigned-off-by: Or Har-Toov \u003cohartoov@nvidia.com\u003e\nReviewed-by: Leon Romanovsky \u003cleonro@nvidia.com\u003e\nSigned-off-by: Yishai Hadas \u003cyishaih@nvidia.com\u003e\n" }, { "commit": "b8675bad53923af639aa89dfcd29baa5875f2767", "tree": "54873864b95b4ee9ce1bf1ee8e87865e5b86a05f", "parents": [ "5a8b665562077b85ad962cbe2b4486195e8685bf" ], "author": { "name": "Or Har-Toov", "email": "ohartoov@nvidia.com", "time": "Mon Jun 15 11:26:08 2026 +0300" }, "committer": { "name": "Yishai Hadas", "email": "yishaih@nvidia.com", "time": "Sun Jul 12 15:20:07 2026 +0300" }, "message": "libibverbs: show effective port bandwidth in ibv_devinfo\n\nThe \u0027active_speed x active_width\u0027 value describes a single port\u0027s PHY\nlink rate. That value does not reflect effective bandwidth in setups\nwhere LAG aggregates two ports, or where the PCIe link to the host is\nnarrower than the wire.\n\nAdd an \u0027effective_speed\u0027 line populated from ibv_query_port_speed() to\nexpose the value that does reflect those conditions.\n\nSigned-off-by: Or Har-Toov \u003cohartoov@nvidia.com\u003e\nSigned-off-by: Yishai Hadas \u003cyishaih@nvidia.com\u003e\n" }, { "commit": "5a8b665562077b85ad962cbe2b4486195e8685bf", "tree": "ff4dd50afe36da986897091da7b44517a35f946f", "parents": [ "f272237493ef309984036f7b85655e11104c61c8" ], "author": { "name": "Leon Romanovsky", "email": "leon@kernel.org", "time": "Wed Jul 08 16:00:56 2026 +0300" }, "committer": { "name": "Leon Romanovsky", "email": "leon@kernel.org", "time": "Wed Jul 08 16:00:56 2026 +0300" }, "message": "Update library version to be 65.0\n\nSigned-off-by: Leon Romanovsky \u003cleon@kernel.org\u003e\n" }, { "commit": "f272237493ef309984036f7b85655e11104c61c8", "tree": "99abc56eee53264382d9e74f3d29ddafb8f9cc81", "parents": [ "a07758d1a1e30051dec1425ddaa5ec44298f6055", "de83d1c208f9550ec1024a132ad982dcba9d8c06" ], "author": { "name": "Leon Romanovsky", "email": "leon@kernel.org", "time": "Sun Jul 05 10:42:27 2026 +0300" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Sun Jul 05 10:42:27 2026 +0300" }, "message": "Merge pull request #1767 from qvicksilver/fix-cache-timeout-ports\n\nlibibnetdisc: handle incomplete fabrics during discovery and cache load" }, { "commit": "a07758d1a1e30051dec1425ddaa5ec44298f6055", "tree": "8c465174b6a3623815a286454f515b6750432773", "parents": [ "9143bddabda120808c82b7f54f0bb6a2f00d8a86", "df2527779289255d01be241e0644ec5cafd62e84" ], "author": { "name": "Leon Romanovsky", "email": "leon@kernel.org", "time": "Sun Jul 05 10:39:47 2026 +0300" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Sun Jul 05 10:39:47 2026 +0300" }, "message": "Merge pull request #1768 from amzn/query_port_speed\n\nefa: Add support for the query port speed verb" }, { "commit": "9143bddabda120808c82b7f54f0bb6a2f00d8a86", "tree": "dd52bf4648064b293139ab628018fd82bec27f98", "parents": [ "1d06522a4be83c1c6faf938d5fc521f7645754dd", "475b17a63ce6a1c1ec7ac31dfbc9e6a8b2123c1b" ], "author": { "name": "Yishai Hadas", "email": "yishaih@mellanox.com", "time": "Thu Jul 02 14:10:15 2026 +0300" }, "committer": { "name": "GitHub", "email": "noreply@github.com", "time": "Thu Jul 02 14:10:15 2026 +0300" }, "message": "Merge pull request #1748 from jpirko/wip_umem_attrs_and_cc\n\nAdd buffer allocation support for Confidential Computing (CoCo) guests" }, { "commit": "475b17a63ce6a1c1ec7ac31dfbc9e6a8b2123c1b", "tree": "1821cb0c43786f06e5dfa0791845a61340468c9f", "parents": [ "3a4a255b84cc4371b9d1d16a22d2b9c628a41be5" ], "author": { "name": "Jiri Pirko", "email": "jiri@nvidia.com", "time": "Fri Jun 05 19:03:00 2026 +0200" }, "committer": { "name": "Jiri Pirko", "email": "jiri@nvidia.com", "time": "Wed Jul 01 10:39:49 2026 +0200" }, "message": "tests: Add tests for ibv_buf provider-aware buffers\n\nAdd test_buf.py exercising the ibv_buf API (ibv_alloc_buf,\nibv_reg_buf_mr, ibv_free_buf), and the ibv_reg_mr_ex()\nIBV_REG_MR_MASK_BUF path, over both a plain PD and a parent domain\ncreated with ALLOW_CC_UNPROTECTED_ALLOC, in API-only and RC/UD traffic\nvariants. Add an is_cq_ex option to the rdma_traffic and atomic_traffic\nhelpers so the tests can drive an extended CQ.\n\nSigned-off-by: Jiri Pirko \u003cjiri@nvidia.com\u003e\n" } ], "next": "3a4a255b84cc4371b9d1d16a22d2b9c628a41be5" }