)]}' { "commit": "14aa71e6603def3bf258d9d05f11fe8454a59e50", "tree": "4cd1915d5800bcbf17d90ae73661f0d0de111dfa", "parents": [ "6ca88b0958d90afc43d09a0dee245c5254959003" ], "author": { "name": "Li Yang", "email": "leoli@freescale.com", "time": "Tue Jul 26 09:50:46 2011 -0500" }, "committer": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Thu Sep 29 19:01:04 2011 -0500" }, "message": "powerpc/85xx: Add support for new P102x/P2020 RDB style boards\n\nThe following boards share a common design but with minor variations\nbetween them:\n\nP1020MSBG-PC\nP1020RDB-PC\nP1020UTM-PC\nP1021RDB-PC\nP1024RDB\nP1025RDB\nP2020RDB-PC\n\nThe P1020RDB-PC shares its roots in the existing P1020RDB board design,\nhowever uses DDR3 instead of DDR2.\nP2020RDB-PC differs from the P102x RDB-PC with 64-bit DDR and 100Mhz SYSCLK.\n\nKey features on these boards include:\n* DDR3\n* NOR flash\n* NAND flash (on RDB\u0027s only)\n* SPI flash (on RDB\u0027s only)\n* SDHC/MMC card slot\n* VSC7385 Ethernet switch (on P1020MBG, P1020RDB, \u0026 P1021RDB)\n* PCIE slot and mini-PCIE slots\n\nAs these boards use soldered DDR chips not regular DIMMs, an on-board EEPROM\nis used to store SPD data. In case of absent or corrupted SPD, falling back\nto timing data embedded in the source code will be used. Raw timing data is\nextracted from DDR chip datasheet. Different speeds of DDR are supported\nwith this approach. ODT option is forced to fit this set of boards, again\nbecause they don\u0027t have regular DIMMs.\n\nCONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS is defined as 5ms to meet\nspecification for writing timing.\n\nVSC firmware Address is defined by default in config file for eTSEC1.\n\nSD width is based off DIP switch. DIP switch is detected on the\nboard by reading i2c bus and setting the appropriate mux values.\n\nSome boards have QE module in the silicon (P1021 and P1025). QE and eLBC\nhave pins multiplexing. QE function needs to be disabled to access Nor Flash\nand CPLD. QE-UEC and QE-UART can be enabled for linux kernel by setting \"qe\"\nin hwconfig. In addition, QE-UEC and QE-TDM also have pins multiplexing, to\nenable QE-TDM for linux kernel, set \"qe;tdm\" in hwconfig. Syntax is as below\n\n\u0027setenv hwconfig qe\u0027 to enable QE UEC/UART and disable Nor-Flash/CPLD.\n\u0027setenv hwconfig \u0027qe;tdm\u0027\u0027 to enalbe QE TDM and disable Nor-Flash/CPLD.\n\nSigned-off-by: York Sun \u003cyorksun@freescale.com\u003e\nSigned-off-by: Li Yang \u003cleoli@freescale.com\u003e\nSigned-off-by: Zhao Chenhui \u003cb26998@freescale.com\u003e\nSigned-off-by: Matthew McClintock \u003cmsm@freescale.com\u003e\nSigned-off-by: Poonam Aggrwal \u003cpoonam.aggrwal@freescale.com\u003e\nSigned-off-by: Priyanka Jain \u003cPriyanka.Jain@freescale.com\u003e\nSigned-off-by: Tang Yuantian \u003cb29983@freescale.com\u003e\nSigned-off-by: ramneek.mehresh \u003cramneek.mehresh@freescale.com\u003e\nSigned-off-by: Prabhakar Kushwaha \u003cprabhakar@freescale.com\u003e\nSigned-off-by: Matthew McClintock \u003cmsm@freescale.com\u003e\nSigned-off-by: Xie Xiaobo \u003cX.Xie@freescale.com\u003e\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\nSigned-off-by: Jerry Huang \u003cChang-Ming.Huang@freescale.com\u003e\nSigned-off-by: Akhil Goyal \u003cakhil.goyal@freescale.com\u003e\n", "tree_diff": [ { "type": "add", "old_id": "0000000000000000000000000000000000000000", "old_mode": 0, "old_path": "/dev/null", "new_id": "8056af8330c591b0cb77148b8edf3673b468d5af", "new_mode": 33188, "new_path": "board/freescale/p1_p2_rdb_pc/Makefile" }, { "type": "add", "old_id": "0000000000000000000000000000000000000000", "old_mode": 0, "old_path": "/dev/null", "new_id": "f0cbde72abb9e01d058b2fc024623a739d3a0f94", "new_mode": 33188, "new_path": "board/freescale/p1_p2_rdb_pc/ddr.c" }, { "type": "add", "old_id": "0000000000000000000000000000000000000000", "old_mode": 0, "old_path": "/dev/null", "new_id": "5ff6ea6aa1f810ddbfcccc65f69c6b1456f80f38", "new_mode": 33188, "new_path": "board/freescale/p1_p2_rdb_pc/law.c" }, { "type": "add", "old_id": "0000000000000000000000000000000000000000", "old_mode": 0, "old_path": "/dev/null", "new_id": "4671128afd4c23548f7c771b7e63a80720960bc8", "new_mode": 33188, "new_path": "board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c" }, { "type": "add", "old_id": "0000000000000000000000000000000000000000", "old_mode": 0, "old_path": "/dev/null", "new_id": "6d2246387a6967b17644e2c39417723802a909e0", "new_mode": 33188, "new_path": "board/freescale/p1_p2_rdb_pc/tlb.c" }, { "type": "modify", "old_id": "d32ff7e15f25cbb8527fb064cde3ad91be7ed923", "old_mode": 33188, "old_path": "boards.cfg", "new_id": "b224a9c0139a85ddee5ff2f7580f2d014c6e9743", "new_mode": 33188, "new_path": "boards.cfg" }, { "type": "add", "old_id": "0000000000000000000000000000000000000000", "old_mode": 0, "old_path": "/dev/null", "new_id": "44377317dd0b47e3ee374fbfa4b87c17ee5fb944", "new_mode": 33188, "new_path": "doc/README.p1_p2_rdb_pc" }, { "type": "add", "old_id": "0000000000000000000000000000000000000000", "old_mode": 0, "old_path": "/dev/null", "new_id": "b9b89cfa5dca84274267e3f4dca4800ec4422f33", "new_mode": 33188, "new_path": "include/configs/p1_p2_rdb_pc.h" }, { "type": "add", "old_id": "0000000000000000000000000000000000000000", "old_mode": 0, "old_path": "/dev/null", "new_id": "475cc496b3d5346c227ca1a618fc257a4b38c05a", "new_mode": 33188, "new_path": "nand_spl/board/freescale/p1_p2_rdb_pc/Makefile" }, { "type": "add", "old_id": "0000000000000000000000000000000000000000", "old_mode": 0, "old_path": "/dev/null", "new_id": "b9796ea6c940c2a2eb9ff062b82d69bdf2f8995f", "new_mode": 33188, "new_path": "nand_spl/board/freescale/p1_p2_rdb_pc/nand_boot.c" } ] }