)]}'
{
  "commit": "2b16e51c2ff1073592a3a3f52a6725bdd7b11f81",
  "tree": "7730651abc9bdf6908eb9324bd3feb515ee91969",
  "parents": [
    "7528cf5f016b5b8b8b12b373f6f31a10bf89233d"
  ],
  "author": {
    "name": "Fabio Estevam",
    "email": "fabio.estevam@freescale.com",
    "time": "Fri Jan 04 16:07:26 2013 +0000"
  },
  "committer": {
    "name": "Stefano Babic",
    "email": "sbabic@denx.de",
    "time": "Wed Jan 09 19:22:06 2013 +0100"
  },
  "message": "mx6: Add workaround for ARM errata\n\nAdd workaround for the following ARM errata: 743622 and 751472.\n\nThe motivation for this change is the following kernel commit 62e4d357a\n(ARM: 7609/1: disable errata work-arounds which access\nsecure registers), which removes the errata from multiplatform kernel.\n\nSince imx has been converted to multiplatform in the kernel, we need to apply\nsuch workarounds into the bootloader.\n\nWorkaround code has been taken from arch/arm/mm/proc-v7.S from 3.7.1 kernel.\n\nExplanation of each erratum is provided at \"Chip Errata for the i.MX 6Dual/6Quad\"\ndocument available at: cache.freescale.com/files/32bit/doc/errata/IMX6DQCE.pdf\n\nSigned-off-by: Fabio Estevam \u003cfabio.estevam@freescale.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "acadef221c8e845873c56563be1a20385aeda964",
      "old_mode": 33188,
      "old_path": "arch/arm/cpu/armv7/mx6/lowlevel_init.S",
      "new_id": "7b60ca7454b88319aaf832f573087ca0213d2b8b",
      "new_mode": 33188,
      "new_path": "arch/arm/cpu/armv7/mx6/lowlevel_init.S"
    }
  ]
}