)]}'
{
  "commit": "362ee04b797d02117e48312010974d69c325be60",
  "tree": "c2333603c11cd6664d01b5e647d4974c8f9a5462",
  "parents": [
    "69fdf900105d9f730b526c760c082d1f6641a489"
  ],
  "author": {
    "name": "Mingkai Hu",
    "email": "Mingkai.hu@freescale.com",
    "time": "Thu May 16 10:18:13 2013 +0800"
  },
  "committer": {
    "name": "Andy Fleming",
    "email": "afleming@freescale.com",
    "time": "Thu Jun 20 17:08:49 2013 -0500"
  },
  "message": "fsl_ifc: add support for different IFC bank count\n\nCalculate reserved fields according to IFC bank count\n\n1. Move csor_ext register behind csor register and fix res offset\n2. Move ifc bank count to config_mpc85xx.h to support 8 bank count\n3. Guard fsl_ifc.h with CONFIG_FSL_IFC macro to eliminate the compile\n   error on some devices that does not have IFC controller.\n\nSigned-off-by: Mingkai Hu \u003cMingkai.hu@freescale.com\u003e\nSigned-off-by: Andy Fleming \u003cafleming@freescale.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "959a0e2a5fabe6d0725e9df8a0a7da21a829dab6",
      "old_mode": 33188,
      "old_path": "arch/powerpc/cpu/mpc8xxx/fsl_ifc.c",
      "new_id": "4e8a4415f5c0f4b0c00c6d30b8f0e9f61c4833d8",
      "new_mode": 33188,
      "new_path": "arch/powerpc/cpu/mpc8xxx/fsl_ifc.c"
    },
    {
      "type": "modify",
      "old_id": "86035d9ab4453c5dc325c0e6922e62c81efdd0dd",
      "old_mode": 33188,
      "old_path": "arch/powerpc/include/asm/config_mpc85xx.h",
      "new_id": "6b1d3c4baf528a0657208e740dc29effb5167a3c",
      "new_mode": 33188,
      "new_path": "arch/powerpc/include/asm/config_mpc85xx.h"
    },
    {
      "type": "modify",
      "old_id": "ba41b73cc0389b149e4c13fdc1d176a31088a9c1",
      "old_mode": 33188,
      "old_path": "arch/powerpc/include/asm/fsl_ifc.h",
      "new_id": "3baf4ccbae4577ecd16924059d37e3cd1c9a7f08",
      "new_mode": 33188,
      "new_path": "arch/powerpc/include/asm/fsl_ifc.h"
    }
  ]
}