)]}'
{
  "commit": "37835d4ba8dc844d055a0dec8a954c8795b58531",
  "tree": "5e2d14da0c535acebffd42f3f442ac34e740bfbb",
  "parents": [
    "283591f171a6a53a0a77fb74055b4f1b06b576c6"
  ],
  "author": {
    "name": "Donghwa Lee",
    "email": "dh09.lee@samsung.com",
    "time": "Thu Apr 05 19:36:12 2012 +0000"
  },
  "committer": {
    "name": "Albert ARIBAUD",
    "email": "albert.u.boot@aribaud.net",
    "time": "Tue May 15 08:31:29 2012 +0200"
  },
  "message": "EXYNOS: add LCD and MIPI DSI clock interface.\n\nTo sets up lcd and mipi clock in EXYNOS display driver, added clock interface.\n\nSigned-off-by: Donghwa Lee \u003cdh09.lee@samsung.com\u003e\nSigned-off-by: Kyungmin Park \u003ckyungmin.park@samsung.com\u003e\nSigned-off-by: Inki Dae \u003cinki.dae@samsung.com\u003e\nSigned-off-by: Minkyu Kang \u003cmk7.kang@samsung.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "2f7048b6a33e39540d4a68e38e99522854f981de",
      "old_mode": 33188,
      "old_path": "arch/arm/cpu/armv7/exynos/clock.c",
      "new_id": "330bd75da9a87260dfdece6587f9f3669133a57d",
      "new_mode": 33188,
      "new_path": "arch/arm/cpu/armv7/exynos/clock.c"
    },
    {
      "type": "modify",
      "old_id": "ff0f6415d8b4082d9b0d5b8f9de3cd92fcdffe80",
      "old_mode": 33188,
      "old_path": "arch/arm/include/asm/arch-exynos/clk.h",
      "new_id": "637fb4bd145384fd8cfdedb04577b54dfba242fa",
      "new_mode": 33188,
      "new_path": "arch/arm/include/asm/arch-exynos/clk.h"
    }
  ]
}