)]}'
{
  "commit": "39a7e7fd538cdf49e7e8a2f0634ea5e15e12b4ec",
  "tree": "1e3500019d9f6b6e490061b230326a5d6ffe4f13",
  "parents": [
    "a880cf3e0e1c220d780eccd0b101170c4499485d"
  ],
  "author": {
    "name": "Kumar Gala",
    "email": "galak@kernel.crashing.org",
    "time": "Thu Sep 17 01:44:39 2009 -0500"
  },
  "committer": {
    "name": "Kumar Gala",
    "email": "galak@kernel.crashing.org",
    "time": "Thu Sep 24 12:05:28 2009 -0500"
  },
  "message": "ppc/p4080: CoreNet platfrom style secondary core release\n\nThe CoreNet platform style of bringing secondary cores out of reset is\na bit different that the PQ3 style.  Mostly the registers that we use\nto setup boot translation, enable time bases, and boot release the cores\nhave moved around.\n\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "fa65bed083b2d64405a2d504219e4e45b8077975",
      "old_mode": 33188,
      "old_path": "cpu/mpc85xx/mp.c",
      "new_id": "b5c6020c7f1c2385586fa3fb96c0c13d5b303dbe",
      "new_mode": 33188,
      "new_path": "cpu/mpc85xx/mp.c"
    }
  ]
}