)]}'
{
  "commit": "3fd673cf363bc86ed42eff713d4e3506720e91a2",
  "tree": "81c598c3b6e11409cf4f9b83d819e857ed95dbfe",
  "parents": [
    "af35be6ac962a737005737ab479da93cac2f596f"
  ],
  "author": {
    "name": "Paul Gortmaker",
    "email": "paul.gortmaker@windriver.com",
    "time": "Fri Dec 30 23:53:07 2011 -0500"
  },
  "committer": {
    "name": "Kumar Gala",
    "email": "galak@kernel.crashing.org",
    "time": "Wed Jan 11 13:58:10 2012 -0600"
  },
  "message": "sbc8548: relocate 64MB user flash to sane boundary\n\nThe current situation has the 64MB user flash at an awkward\nalignment; shifted back from 0xfc00_0000 by 8M, to leave an 8MB hole\nfor the soldered on boot flash @ EOM.  But to switch to optionally\nsupporting booting off the 64MB flash, the 64MB will then be mapped\nat the sane address of 0xfc00_0000.\n\nThis leads to awkward things when programming the 64MB flash prior\nto transitioning to it -- i.e. even though the chip spans from\n0xfb80_0000 to 0xff7f_ffff, you would have to program a u-boot image\ninto the two sectors from 0xfbf0_0000 --\u003e 0xfbff_ffff so that it was\nin the right place when JP12/SW2.8 were switched to make the 64MB on\n/CS0. (i.e. the chip is only looking at the bits in mask 0x3ff_ffff)\n\nWe also have to have three TLB entries responsible for dealing with\nmapping the 64MB flash due to this 8MB of misalignment.\n\nIn the end, there is address space from 0xec00_0000 to 0xefff_ffff\nwhere we can map it, and then the transition from booting from one\nconfig to the other will be a simple 0xec --\u003e 0xfc mapping.  Plus we\ncan toss out a TLB entry.\n\nNote that TLB0 is kept at 64MB and not shrunk down to the 8MB boot\nflash; this means we won\u0027t have to change it when the alternate\nconfig uses the full 64MB for booting, in TLB0.\n\nSigned-off-by: Paul Gortmaker \u003cpaul.gortmaker@windriver.com\u003e\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n",
  "tree_diff": [
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}