)]}'
{
  "commit": "443ce4ac9d1138ae5ae6863b2d40a96fd6edf523",
  "tree": "8331ff5381208ea52251216a18a43b28a3549d07",
  "parents": [
    "16025ea45539219f2a7c750c6f0ae983ea5c2737"
  ],
  "author": {
    "name": "Prafulla Wadaskar",
    "email": "prafulla@marvell.com",
    "time": "Thu Jul 16 20:58:02 2009 +0530"
  },
  "committer": {
    "name": "Ben Warren",
    "email": "biggerbadderben@gmail.com",
    "time": "Wed Jul 22 22:53:45 2009 -0700"
  },
  "message": "net: phy: bugfixes: mv88E61xx multichip addressing support\n\nWith these fixes, this driver works properly for multi chip\naddressging mode\n\nBugfixes:\n1. Build error fixed for function mv88e61xx_busychk_multic-fixed\n2. PHY dev address error detection- fixed\n3. wrong busy bit was refered in function mv88e61xx_busychk -fixed\n4. invalid data read ptr was refered for RD_PHY in case of\n\tmultichip addressing mode -fixed\n\nThe Multichip Address mode is tested with RD6281A board having\nMV88E6165 switch on it\n\nSigned-off-by: Prafulla Wadaskar \u003cprafulla@marvell.com\u003e\nSigned-off-by: Ben Warren \u003cbiggerbadderben@gmail.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "ec47286ddde0e1a49c23bb309d5d536d9204073f",
      "old_mode": 33188,
      "old_path": "drivers/net/phy/mv88e61xx.c",
      "new_id": "29630f5bf566aad36d80abe6750bf2454c37e8d4",
      "new_mode": 33188,
      "new_path": "drivers/net/phy/mv88e61xx.c"
    },
    {
      "type": "modify",
      "old_id": "42794644eca1eec1ab9f928734d9cd0ee7cf25d0",
      "old_mode": 33188,
      "old_path": "drivers/net/phy/mv88e61xx.h",
      "new_id": "57762b686175f1810184ee2dd2c8caf0591d4026",
      "new_mode": 33188,
      "new_path": "drivers/net/phy/mv88e61xx.h"
    }
  ]
}