)]}'
{
  "commit": "461632bd71152fefd7f6b155d6b870e586212416",
  "tree": "3ef7efdffdd08f753a3b3a1b2ca88559088749dc",
  "parents": [
    "b5f7c8732ad99b0c1a7fa456f706de1ab7d74eef"
  ],
  "author": {
    "name": "Liu Gang",
    "email": "Gang.Liu@freescale.com",
    "time": "Thu Aug 09 05:10:03 2012 +0000"
  },
  "committer": {
    "name": "Andy Fleming",
    "email": "afleming@freescale.com",
    "time": "Thu Aug 23 10:24:15 2012 -0500"
  },
  "message": "powerpc/corenet_ds: Slave module for boot from PCIE\n\nWhen boot from PCIE, slave\u0027s core should be in holdoff after powered on for\nsome specific requirements. Master will release the slave\u0027s core at the\nright time by PCIE interface.\n\nSlave\u0027s ucode and ENV can be stored in master\u0027s memory space, then slave\ncan fetch them through PCIE interface. For the corenet platform, ucode is\nfor Fman.\n\nNOTE: Because the slave can not erase, write master\u0027s NOR flash by\n\t  PCIE interface, so it can not modify the ENV parameters stored\n\t  in master\u0027s NOR flash using \"saveenv\" or other commands.\n\nenvironment and requirement:\n\nmaster:\n\t1. NOR flash for its own u-boot image, ucode and ENV space.\n\t2. Slave\u0027s u-boot image is in master NOR flash.\n\t3. Put the slave\u0027s ucode and ENV into it\u0027s own memory space.\n\t4. Normally boot from local NOR flash.\n\t5. Configure PCIE system if needed.\nslave:\n\t1. Just has EEPROM for RCW. No flash for u-boot image, ucode and ENV.\n\t2. Boot location should be set to one PCIE interface by RCW.\n\t3. RCW should configure the SerDes, PCIE interfaces correctly.\n\t4. Must set all the cores in holdoff by RCW.\n\t5. Must be powered on before master\u0027s boot.\n\nFor the slave module, need to finish these processes:\n\t1. Set the boot location to one PCIE interface by RCW.\n    2. Set a specific TLB entry for the boot process.\n\t3. Set a LAW entry with the TargetID of one PCIE for the boot.\n\t4. Set a specific TLB entry in order to fetch ucode and ENV from\n\t   master.\n\t5. Set a LAW entry with the TargetID one of the PCIE ports for\n\t   ucode and ENV.\n\t6. Slave\u0027s u-boot image should be generated specifically by\n\t   make xxxx_SRIO_PCIE_BOOT_config.\n\t   This will set SYS_TEXT_BASE\u003d0xFFF80000 and other configurations.\n\nIn addition, the processes are very similar between boot from SRIO and\nboot from PCIE. Some configurations like the address spaces can be set to\nthe same. So the module of boot from PCIE was added based on the existing\nmodule of boot from SRIO, and the following changes were needed:\n\t1. Updated the README.srio-boot-corenet to add descriptions about\n\t   boot from PCIE, and change the name to\n\t   README.srio-pcie-boot-corenet.\n\t2. Changed the compile config \"xxxx_SRIOBOOT_SLAVE\" to\n\t   \"xxxx_SRIO_PCIE_BOOT\", and the image builded with\n\t   \"xxxx_SRIO_PCIE_BOOT\" can support both the boot from SRIO and\n\t   from PCIE.\n\t3. Updated other macros and documents if needed to add information\n\t   about boot from PCIE.\n\nSigned-off-by: Liu Gang \u003cGang.Liu@freescale.com\u003e\nSigned-off-by: Andy Fleming \u003cafleming@freescale.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "da2162728fdbe1a274573f5cd683610fa7b0ffbe",
      "old_mode": 33188,
      "old_path": "board/freescale/common/p_corenet/tlb.c",
      "new_id": "e5cf208a905fec06485a52514f3b9cb84edcec24",
      "new_mode": 33188,
      "new_path": "board/freescale/common/p_corenet/tlb.c"
    },
    {
      "type": "modify",
      "old_id": "a408405e6d43a023759a82eb9ee0de9fced2bcc3",
      "old_mode": 33188,
      "old_path": "boards.cfg",
      "new_id": "f102f7a7086d0f1f8cb63641da1b741c701b516f",
      "new_mode": 33188,
      "new_path": "boards.cfg"
    },
    {
      "type": "modify",
      "old_id": "3bf0f957b3a75f58f0bc0b15356181974bb31aed",
      "old_mode": 33188,
      "old_path": "common/env_remote.c",
      "new_id": "a7b147b20db2b62b1161be6cc3a2822cb32468d5",
      "new_mode": 33188,
      "new_path": "common/env_remote.c"
    },
    {
      "type": "modify",
      "old_id": "a71a0ce4267944c1f42874bb71b32b6c0ab553eb",
      "old_mode": 33188,
      "old_path": "drivers/misc/fsl_law.c",
      "new_id": "223cd5d65c816aac52f969e05332a970b73e7e51",
      "new_mode": 33188,
      "new_path": "drivers/misc/fsl_law.c"
    },
    {
      "type": "modify",
      "old_id": "18e4bce083fd51bbe12360dd57c6ce88585e4e32",
      "old_mode": 33188,
      "old_path": "include/configs/P2041RDB.h",
      "new_id": "ce31fdc98db2a937b9f94824aea640a86aa343ed",
      "new_mode": 33188,
      "new_path": "include/configs/P2041RDB.h"
    },
    {
      "type": "modify",
      "old_id": "1d25fc1909b2037a809ca82d163fd6c7f1492900",
      "old_mode": 33188,
      "old_path": "include/configs/corenet_ds.h",
      "new_id": "8f6f39add33bec2a993575766be007dd58d1dc42",
      "new_mode": 33188,
      "new_path": "include/configs/corenet_ds.h"
    }
  ]
}