/*
 * Copyright 2014 Texas Instruments, Inc.
 *
 * Keystone 2 Lamarr SoC specific device tree
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

/ {
	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		interrupt-parent = <&gic>;

		cpu@0 {
			compatible = "arm,cortex-a15";
			device_type = "cpu";
			reg = <0>;
		};

		cpu@1 {
			compatible = "arm,cortex-a15";
			device_type = "cpu";
			reg = <1>;
		};
	};

	soc {
		/include/ "keystone-k2l-clocks.dtsi"

		uart2: serial@02348400 {
			compatible = "ns16550a";
			current-speed = <115200>;
			reg-shift = <2>;
			reg-io-width = <4>;
			reg = <0x02348400 0x100>;
			clocks	= <&clkuart2>;
			interrupts = <GIC_SPI 432 IRQ_TYPE_EDGE_RISING>;
		};

		uart3:	serial@02348800 {
			compatible = "ns16550a";
			current-speed = <115200>;
			reg-shift = <2>;
			reg-io-width = <4>;
			reg = <0x02348800 0x100>;
			clocks	= <&clkuart3>;
			interrupts = <GIC_SPI 435 IRQ_TYPE_EDGE_RISING>;
		};

		dspgpio0: keystone_dsp_gpio@02620240 {
			compatible = "ti,keystone-dsp-gpio";
			gpio-controller;
			#gpio-cells = <2>;
			gpio,syscon-dev = <&devctrl 0x240>;
		};

		dspgpio1: keystone_dsp_gpio@2620244 {
			compatible = "ti,keystone-dsp-gpio";
			gpio-controller;
			#gpio-cells = <2>;
			gpio,syscon-dev = <&devctrl 0x244>;
		};

		dspgpio2: keystone_dsp_gpio@2620248 {
			compatible = "ti,keystone-dsp-gpio";
			gpio-controller;
			#gpio-cells = <2>;
			gpio,syscon-dev = <&devctrl 0x248>;
		};

		dspgpio3: keystone_dsp_gpio@262024c {
			compatible = "ti,keystone-dsp-gpio";
			gpio-controller;
			#gpio-cells = <2>;
			gpio,syscon-dev = <&devctrl 0x24c>;
		};

		mdio: mdio@26200f00 {
			compatible	= "ti,keystone_mdio", "ti,davinci_mdio";
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x26200f00 0x100>;
			status = "disabled";
			clocks = <&clkcpgmac>;
			clock-names = "fck";
			bus_freq	= <2500000>;
		};
		/include/ "keystone-k2l-netcp.dtsi"
	};
};

&spi0 {
       ti,davinci-spi-num-cs = <5>;
};

&spi1 {
       ti,davinci-spi-num-cs = <3>;
};

&spi2 {
       ti,davinci-spi-num-cs = <5>;
       /* Pin muxed. Enabled and configured by Bootloader */
       status = "disabled";
};