diff --git a/arch/arm/cpu/armv7/u8500/lowlevel.S b/arch/arm/cpu/armv7/u8500/lowlevel.S
index 743071c..cffdfd1 100644
--- a/arch/arm/cpu/armv7/u8500/lowlevel.S
+++ b/arch/arm/cpu/armv7/u8500/lowlevel.S
@@ -28,8 +28,8 @@
 	.align	5
 .globl reset_cpu
 reset_cpu:
-        ldr r0, =CFG_PRCMU_BASE
-        ldr r1, =0x1
-        str r1, [r0, #0x228]
+	ldr r0, =CFG_PRCMU_BASE
+	ldr r1, =0x1
+	str r1, [r0, #0x228]
 _loop_forever:
 	b	_loop_forever
diff --git a/arch/arm/include/asm/arch-u8500/gpio.h b/arch/arm/include/asm/arch-u8500/gpio.h
index 769def1..7b5c97d 100644
--- a/arch/arm/include/asm/arch-u8500/gpio.h
+++ b/arch/arm/include/asm/arch-u8500/gpio.h
@@ -38,25 +38,25 @@
 
 
 struct gpio_register {
-	u32 gpio_dat;	/* data register *//*0x000 */
-	u32 gpio_dats;	/* data Set register *//*0x004 */
-	u32 gpio_datc;	/* data Clear register *//*0x008 */
-	u32 gpio_pdis;	/* Pull disable register *//*0x00C */
-	u32 gpio_dir;	/* data direction register *//*0x010 */
-	u32 gpio_dirs;	/* data dir Set register *//*0x014 */
-	u32 gpio_dirc;	/* data dir Clear register *//*0x018 */
-	u32 gpio_slpm;	/* Sleep mode register *//*0x01C */
-	u32 gpio_afsa;	/* AltFun A Select reg *//*0x020 */
-	u32 gpio_afsb;	/* AltFun B Select reg *//*0x024 */
-	u32 gpio_lowemi;/* low EMI Select reg *//*0x028 */
+	u32 gpio_dat;	/* data register : 0x000 */
+	u32 gpio_dats;	/* data Set register : 0x004 */
+	u32 gpio_datc;	/* data Clear register : 0x008 */
+	u32 gpio_pdis;	/* Pull disable register : 0x00C */
+	u32 gpio_dir;	/* data direction register : 0x010 */
+	u32 gpio_dirs;	/* data dir Set register : 0x014 */
+	u32 gpio_dirc;	/* data dir Clear register : 0x018 */
+	u32 gpio_slpm;	/* Sleep mode register : 0x01C */
+	u32 gpio_afsa;	/* AltFun A Select reg : 0x020 */
+	u32 gpio_afsb;	/* AltFun B Select reg : 0x024 */
+	u32 gpio_lowemi;/* low EMI Select reg : 0x028 */
 	u32 reserved_1[(0x040 - 0x02C) >> 2];	/*0x028-0x3C Reserved*/
-	u32 gpio_rimsc;	/* rising edge intr set/clear *//*0x040 */
-	u32 gpio_fimsc;	/* falling edge intr set/clear register *//*0x044 */
-	u32 gpio_mis;	/* masked interrupt status register *//*0x048 */
-	u32 gpio_ic;	/* Interrupt Clear register *//*0x04C */
-	u32 gpio_rwimsc;/* Rising-edge Wakeup IMSC register *//*0x050 */
-	u32 gpio_fwimsc;/* Falling-edge Wakeup IMSC register *//*0x054 */
-	u32 gpio_wks;	/* Wakeup Status register *//*0x058 */
+	u32 gpio_rimsc;	/* rising edge intr set/clear : 0x040 */
+	u32 gpio_fimsc;	/* falling edge intr set/clear register : 0x044 */
+	u32 gpio_mis;	/* masked interrupt status register : 0x048 */
+	u32 gpio_ic;	/* Interrupt Clear register : 0x04C */
+	u32 gpio_rwimsc;/* Rising-edge Wakeup IMSC register : 0x050 */
+	u32 gpio_fwimsc;/* Falling-edge Wakeup IMSC register : 0x054 */
+	u32 gpio_wks;	/* Wakeup Status register : 0x058 */
 };
 
 /* Error values returned by functions */
diff --git a/board/samsung/smdkv310/lowlevel_init.S b/board/samsung/smdkv310/lowlevel_init.S
index 04f6579..58b737b 100644
--- a/board/samsung/smdkv310/lowlevel_init.S
+++ b/board/samsung/smdkv310/lowlevel_init.S
@@ -50,7 +50,7 @@
 
 	/* check reset status  */
 	ldr     r0, =(S5PC210_POWER_BASE + 0x81C)	@ INFORM7
-        ldr     r1, [r0]
+	ldr     r1, [r0]
 
 	/* AFTR wakeup reset */
 	ldr	r2, =S5P_CHECK_DIDLE