)]}'
{
  "commit": "5800e7ab32c200836e81ab2384817d93105561c5",
  "tree": "a8022cbb490f4abbe4aba4480928abde59c70404",
  "parents": [
    "076bff8f4746baf7c83b96049d97e9dd4454dace"
  ],
  "author": {
    "name": "york",
    "email": "yorksun@freescale.com",
    "time": "Fri Jul 02 22:25:53 2010 +0000"
  },
  "committer": {
    "name": "Kumar Gala",
    "email": "galak@kernel.crashing.org",
    "time": "Mon Jul 26 13:16:09 2010 -0500"
  },
  "message": "powerpc/8xxx: Enable quad-rank DIMMs.\n\nPrevious code presumes each DIMM has up to two rank (chip select). Newer\nDDR controller supports up to four chip select on one DIMM.\n\nSigned-off-by: York Sun \u003cyorksun@freescale.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "69c1c7cb803030fb77dcb39ed464defd2d70f651",
      "old_mode": 33188,
      "old_path": "arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c",
      "new_id": "6e73b1d31433ca2d9b075895bb57cee9f7e08c6a",
      "new_mode": 33188,
      "new_path": "arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c"
    },
    {
      "type": "modify",
      "old_id": "e888e3ea562d2feb78afcdcb402941f3fb9331e9",
      "old_mode": 33188,
      "old_path": "arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c",
      "new_id": "ce6c148d0966114ffaeae4908ae392bd9efaf2fe",
      "new_mode": 33188,
      "new_path": "arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c"
    },
    {
      "type": "modify",
      "old_id": "ebbdb69c0df42d8264ebc417538ac57455277bdb",
      "old_mode": 33188,
      "old_path": "arch/powerpc/cpu/mpc8xxx/ddr/options.c",
      "new_id": "1d5f3e2cdd4d492cb2a164ff178feaa34ef22c13",
      "new_mode": 33188,
      "new_path": "arch/powerpc/cpu/mpc8xxx/ddr/options.c"
    },
    {
      "type": "modify",
      "old_id": "02920dbfd7bc08e993d22ccf878f120eeb58e983",
      "old_mode": 33188,
      "old_path": "arch/powerpc/include/asm/fsl_ddr_sdram.h",
      "new_id": "431327e94d69843d0a33a8c45b93d597ff19a710",
      "new_mode": 33188,
      "new_path": "arch/powerpc/include/asm/fsl_ddr_sdram.h"
    }
  ]
}