)]}'
{
  "commit": "5a516748a8e003aa80eab259cbf94026a6e30c93",
  "tree": "aad27fcf4aeb52e942fbc8ecd4fffca4573ffd63",
  "parents": [
    "f64bd7c038468de7b6cfa47e88dd0f5ce6c38504"
  ],
  "author": {
    "name": "Liu Gang",
    "email": "Gang.Liu@freescale.com",
    "time": "Tue May 07 16:30:45 2013 +0800"
  },
  "committer": {
    "name": "Andy Fleming",
    "email": "afleming@freescale.com",
    "time": "Thu Jun 20 17:08:47 2013 -0500"
  },
  "message": "powerpc/doc: Update the README.srio-pcie-boot-corenet\n\n1. Misalignment will be found in the doc/README.srio-pcie-boot-corenet\n   file when the tabs are set to 8 characters. And the standard for\n   u-boot should be 8 character tabs! So this issue should be amended.\n\n2. Add a NOTE for the ENV parameters of the Slave.\n\nSigned-off-by: Liu Gang \u003cGang.Liu@freescale.com\u003e\nSigned-off-by: Andy Fleming \u003cafleming@freescale.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "cd7e7ee9b346e4c1323c33f731ee1cf035a650f0",
      "old_mode": 33188,
      "old_path": "doc/README.srio-pcie-boot-corenet",
      "new_id": "2b1f76b8d0287a993df33f9c0d72c72564ffddd9",
      "new_mode": 33188,
      "new_path": "doc/README.srio-pcie-boot-corenet"
    }
  ]
}