tree 68b7e4f2a7167fac1d056de8bcf0b9d5fb4769eb
parent 92b8964bed0d1b779d9e26be4e16755b5c635415
author Stefan Roese <sr@denx.de> 1255953983 +0200
committer Stefan Roese <sr@denx.de> 1256306676 +0200

ppc4xx: Add function to check and dynamically change PCI sync clock

PPC440EP(x)/PPC440GR(x):
In asynchronous PCI mode, the synchronous PCI clock must meet
certain requirements. The following equation describes the
relationship that must be maintained between the asynchronous PCI
clock and synchronous PCI clock. Select an appropriate PCI:PLB
ratio to maintain the relationship:

AsyncPCIClk - 1MHz <= SyncPCIclock <= (2 * AsyncPCIClk) - 1MHz

This patch now adds a function to check and reconfigure the sync
PCI clock to meet this requirement. This is in preparation for
some AMCC boards (Sequoia/Rainier and Yosemite/Yellowstone) using this
function to not violate the PCI clocking rules.

Signed-off-by: Stefan Roese <sr@denx.de>