)]}'
{
  "commit": "62534beb2fdd67490c3723f22b8982e7d64fc104",
  "tree": "3843bdce63bfeb6b9df290121b2650533397ed7f",
  "parents": [
    "05d8dce9d07cf4073ea15fbc448c1ce22b6baf0f"
  ],
  "author": {
    "name": "Stefan Roese",
    "email": "sr@denx.de",
    "time": "Fri Mar 17 10:28:24 2006 +0100"
  },
  "committer": {
    "name": "Stefan Roese",
    "email": "sr@denx.de",
    "time": "Fri Mar 31 14:32:07 2006 +0200"
  },
  "message": "Updates to common PPC4xx onboard (DDR)SDRAM init code (405 and 440)\n\n405 SDRAM: - The SDRAM parameters can now be defined in the board\n             config file and the 405 SDRAM controller values will\n             be calculated upon bootup (see PPChameleonEVB).\n             When those settings are not defined in the board\n             config file, the register setup will be as it is now,\n             so this implementation should not break any current\n             design using this code.\n\n             Thanks to Andrea Marson from DAVE for this patch.\n\n440 DDR:   - Added function sdram_tr1_set to auto calculate the\n             TR1 value for the DDR.\n           - Added ECC support (see p3p440).\n\nPatch by Stefan Roese, 17 Mar 2006\n",
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