)]}'
{
  "commit": "66412c6371cfd6e056679abedea7d6fafe6a0422",
  "tree": "261d51ec7e7c2a22f0bd5db5fca43d4fc9910aeb",
  "parents": [
    "d90fdba6ca0b08c77cced6e914609e3696dd5909"
  ],
  "author": {
    "name": "Kumar Gala",
    "email": "galak@kernel.crashing.org",
    "time": "Fri Feb 18 05:40:54 2011 -0600"
  },
  "committer": {
    "name": "Kumar Gala",
    "email": "galak@kernel.crashing.org",
    "time": "Thu Apr 28 22:09:24 2011 -0500"
  },
  "message": "powerpc/85xx: Change timebase divisor to be defined per processor\n\nIntroduce new CONFIG_SYS_FSL_TBCLK_DIV on 85xx platforms because\ndifferent SoCs have different divisor amounts.  All the PQ3 parts are\n/8, the P4080/P4080 is /16, and P2040/P3041/P5020 are /32.\n\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "157cc9e2b2cb185694a053703356427cf9d87aca",
      "old_mode": 33188,
      "old_path": "README",
      "new_id": "2754d1e8b899184df08e3cd588ca1ceca04f7575",
      "new_mode": 33188,
      "new_path": "README"
    },
    {
      "type": "modify",
      "old_id": "f5b39c067c73843e1aeeacdea3fd392bc9d1700f",
      "old_mode": 33188,
      "old_path": "arch/powerpc/cpu/mpc85xx/cpu.c",
      "new_id": "f863f4aad02958f4c35c18c1d14c4e36272156f5",
      "new_mode": 33188,
      "new_path": "arch/powerpc/cpu/mpc85xx/cpu.c"
    },
    {
      "type": "modify",
      "old_id": "ccf703b2430eb87a4805a2f5fc5cad18f45e9dca",
      "old_mode": 33188,
      "old_path": "arch/powerpc/include/asm/config_mpc85xx.h",
      "new_id": "41c2d20df5deab4fbfa3d56185fef760bbb69b09",
      "new_mode": 33188,
      "new_path": "arch/powerpc/include/asm/config_mpc85xx.h"
    }
  ]
}
