board/amlogic/g12a_newman_p0/g12a_newman_p0.c

/*
 * board/amlogic/g12a_newman_p0/g12a_newman_p0.c
 *
 * Copyright (C) 2015 Amlogic, Inc. All rights reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful, but WITHOUT
 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 * more details.
 *
 * You should have received a copy of the GNU General Public License along
 * with this program; if not, write to the Free Software Foundation, Inc.,
 * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
*/

#include <common.h>
#include <malloc.h>
#include <errno.h>
#include <environment.h>
#include <fdt_support.h>
#include <flash_ts.h>
#include <libfdt.h>
#include <asm/cpu_id.h>
#ifdef CONFIG_SYS_I2C_AML
#include <aml_i2c.h>
#include <asm/arch/secure_apb.h>
#endif
#ifdef CONFIG_AML_VPU
#include <vpu.h>
#endif
#include <vpp.h>
#ifdef CONFIG_AML_V2_FACTORY_BURN
#include <amlogic/aml_v2_burning.h>
#endif// #ifdef CONFIG_AML_V2_FACTORY_BURN
#ifdef CONFIG_AML_HDMITX20
#include <amlogic/hdmi.h>
#endif
#ifdef CONFIG_AML_LCD
#include <amlogic/aml_lcd.h>
#endif
#include <linux/mtd/partitions.h>
#include <linux/sizes.h>
#include <asm-generic/gpio.h>
#ifdef CONFIG_AML_SPIFC
#include <dm.h>
#include <amlogic/spifc.h>
#endif

#include <asm/arch/gpio.h>

DECLARE_GLOBAL_DATA_PTR;


int do_get_ddictype (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
#if defined(CONFIG_AML_MTD) || defined(CONFIG_AML_MMC)
#if defined(CONFIG_AML_MTD)
	extern bool amlnf_is_inited(void);
	if(!amlnf_is_inited()) {
#endif

#if defined(CONFIG_AML_MMC)
	extern bool amlmmc_is_inited(void);
	if(!amlmmc_is_inited()) {
#endif
		setenv("ddic_type", "NOVATEK");
		return 0;
	}

	flash_ts_init();

	const char *fts_key = "ddic.type";

	char fts_value[256] = { 0 };
	flash_ts_get(fts_key, fts_value, sizeof(fts_value));

	printf("FTS read: ddic.type -> %s\n", fts_value);

	if (strncmp(fts_value, "FITI", sizeof(fts_value)) == 0) {
		setenv("ddic_type", "FITI");
	} else {
		setenv("ddic_type", "NOVATEK");
	}
#endif
	return 0;
}

U_BOOT_CMD(
	get_ddictype, 1, 0, do_get_ddictype,
	"get ddic type",
	"  This command will get and setenv 'ddic_type'\n"
);

int serial_set_pin_port(unsigned long port_base)
{
    //UART in "Always On Module"
    //GPIOAO_0==tx,GPIOAO_1==rx
    //setbits_le32(P_AO_RTI_PIN_MUX_REG,3<<11);
    return 0;
}

//SOC_VDDCPU_DVFS0
#define VDD_CPU_DVFS0_EN_1       GPIOEE(GPIOZ_13)
#define VDD_CPU_DVFS0_EN_1_NAME	 "GPIOZ_13"

//SOC_VDDCPU_DVFS1
#define VDD_CPU_DVFS1_EN_1       GPIOEE(GPIOZ_2)
#define VDD_CPU_DVFS1_EN_1_NAME	 "GPIOZ_2"

//SOC_VDDEE_DVFS0
#define VDD_GPU_DVFS0_EN_1       GPIOEE(GPIOA_13)
#define VDD_GPU_DVFS0_EN_1_NAME	 "GPIOA_13"

//SOC_VDDEE_DVFS1
#define VDD_GPU_DVFS1_EN_1       GPIOEE(GPIOZ_0)
#define VDD_GPU_DVFS1_EN_1_NAME	 "GPIOZ_0"

static void CPU_GPU_Voltage_init(void)
{
    int ret;

    ret = gpio_request(VDD_CPU_DVFS0_EN_1,
        VDD_CPU_DVFS0_EN_1_NAME);
    if (ret && ret != -EBUSY) {
        printf("gpio: requesting pin %s failed\n", VDD_CPU_DVFS0_EN_1_NAME);
        return;
    }
    gpio_direction_output(VDD_CPU_DVFS0_EN_1, 1);

    ret = gpio_request(VDD_CPU_DVFS1_EN_1,
        VDD_CPU_DVFS1_EN_1_NAME);
    if (ret && ret != -EBUSY) {
        printf("gpio: requesting pin %s failed\n", VDD_CPU_DVFS1_EN_1_NAME);
        return;
    }
    gpio_direction_output(VDD_CPU_DVFS1_EN_1, 1);

	//GPU
	ret = gpio_request(VDD_GPU_DVFS0_EN_1,
        VDD_GPU_DVFS0_EN_1_NAME);
    if (ret && ret != -EBUSY) {
        printf("gpio: requesting pin %s failed\n", VDD_GPU_DVFS0_EN_1_NAME);
        return;
    }
    gpio_direction_output(VDD_GPU_DVFS0_EN_1, 0);

    ret = gpio_request(VDD_GPU_DVFS1_EN_1,
        VDD_GPU_DVFS1_EN_1_NAME);
    if (ret && ret != -EBUSY) {
        printf("gpio: requesting pin %s failed\n", VDD_GPU_DVFS1_EN_1_NAME);
        return;
    }
    gpio_direction_output(VDD_GPU_DVFS1_EN_1, 1);
}

//SOC_DISP_ID
#define DISP_ID_PIN      GPIOEE(GPIOH_5)
#define DISP_ID_PIN_NAME "GPIOH_5"

static void panel_detect_init(void)
{
    int ret;

    ret = gpio_request(DISP_ID_PIN, DISP_ID_PIN_NAME);
    if (ret && ret != -EBUSY) {
        printf("gpio: requesting pin %s failed\n", DISP_ID_PIN_NAME);
        return;
    }
    gpio_direction_input(DISP_ID_PIN);
}

//SOC_BL_ENABLE
#define BL_ENABLE_PIN      GPIOEE(GPIOA_10)
#define BL_ENABLE_PIN_NAME "GPIOA_10"

static void enable_backlight(void)
{
    int ret;

    ret = gpio_request(BL_ENABLE_PIN, BL_ENABLE_PIN_NAME);
    if (ret && ret != -EBUSY) {
        printf("gpio: requesting pin %s failed\n", BL_ENABLE_PIN_NAME);
        return;
    }
    gpio_direction_output(BL_ENABLE_PIN, 1);
}

int dram_init(void)
{
	gd->ram_size = PHYS_SDRAM_1_SIZE;
	return 0;
}

/* secondary_boot_func
 * this function should be write with asm, here, is is only for compiling pass
 * */
void secondary_boot_func(void)
{
}

#if CONFIG_AML_SD_EMMC
#include <mmc.h>
#include <asm/arch/sd_emmc.h>
static int  sd_emmc_init(unsigned port)
{
    switch (port)
	{
		case SDIO_PORT_A:
			break;
		case SDIO_PORT_B:
			//todo add card detect
			/* check card detect */
			clrbits_le32(P_PERIPHS_PIN_MUX_9, 0xF << 24);
			setbits_le32(P_PREG_PAD_GPIO1_EN_N, 1 << 6);
			setbits_le32(P_PAD_PULL_UP_EN_REG1, 1 << 6);
			setbits_le32(P_PAD_PULL_UP_REG1, 1 << 6);
			break;
		case SDIO_PORT_C:
			//enable pull up
			//clrbits_le32(P_PAD_PULL_UP_REG3, 0xff<<0);
			break;
		default:
			break;
	}

	return cpu_sd_emmc_init(port);
}

extern unsigned sd_debug_board_1bit_flag;

static void sd_emmc_pwr_prepare(unsigned port)
{
	cpu_sd_emmc_pwr_prepare(port);
}

static void sd_emmc_pwr_on(unsigned port)
{
    switch (port)
	{
		case SDIO_PORT_A:
			break;
		case SDIO_PORT_B:
//            clrbits_le32(P_PREG_PAD_GPIO5_O,(1<<31)); //CARD_8
//            clrbits_le32(P_PREG_PAD_GPIO5_EN_N,(1<<31));
			/// @todo NOT FINISH
			break;
		case SDIO_PORT_C:
			break;
		default:
			break;
	}
	return;
}
static void sd_emmc_pwr_off(unsigned port)
{
	/// @todo NOT FINISH
    switch (port)
	{
		case SDIO_PORT_A:
			break;
		case SDIO_PORT_B:
//            setbits_le32(P_PREG_PAD_GPIO5_O,(1<<31)); //CARD_8
//            clrbits_le32(P_PREG_PAD_GPIO5_EN_N,(1<<31));
			break;
		case SDIO_PORT_C:
			break;
				default:
			break;
	}
	return;
}

// #define CONFIG_TSD      1
static void board_mmc_register(unsigned port)
{
	struct aml_card_sd_info *aml_priv=cpu_sd_emmc_get(port);
    if (aml_priv == NULL)
		return;

	aml_priv->sd_emmc_init=sd_emmc_init;
	aml_priv->sd_emmc_detect=sd_emmc_detect;
	aml_priv->sd_emmc_pwr_off=sd_emmc_pwr_off;
	aml_priv->sd_emmc_pwr_on=sd_emmc_pwr_on;
	aml_priv->sd_emmc_pwr_prepare=sd_emmc_pwr_prepare;
	aml_priv->desc_buf = malloc(NEWSD_MAX_DESC_MUN*(sizeof(struct sd_emmc_desc_info)));

	if (NULL == aml_priv->desc_buf)
		printf(" desc_buf Dma alloc Fail!\n");
	else
		printf("aml_priv->desc_buf = 0x%p\n",aml_priv->desc_buf);

	sd_emmc_register(aml_priv);
}
int board_mmc_init(bd_t	*bis)
{
#if defined(CONFIG_ENV_IS_NOWHERE) && defined(CONFIG_AML_SD_EMMC)
	struct mmc *mmc;
#endif
#ifdef CONFIG_VLSI_EMULATOR
	//board_mmc_register(SDIO_PORT_A);
#else
	//board_mmc_register(SDIO_PORT_B);
#endif
	board_mmc_register(SDIO_PORT_B);
	board_mmc_register(SDIO_PORT_C);
//	board_mmc_register(SDIO_PORT_B1);

#if defined(CONFIG_ENV_IS_NOWHERE) && defined(CONFIG_AML_SD_EMMC)
	/* try emmc here. */
	mmc = find_mmc_device(CONFIG_SYS_MMC_ENV_DEV);
	if (!mmc)
		printf("%s() %d: No MMC found\n", __func__, __LINE__);
	else if (mmc_init(mmc))
		printf("%s() %d: MMC init failed\n", __func__, __LINE__);
#endif
	return 0;
}
#endif

#ifdef CONFIG_SYS_I2C_AML
struct aml_i2c_platform g_aml_i2c_plat[] = {
	{
		.wait_count         = 1000000,
		.wait_ack_interval  = 5,
		.wait_read_interval = 5,
		.wait_xfer_interval = 5,
		.master_no          = AML_I2C_MASTER_AO,
		.use_pio            = 0,
		.master_i2c_speed   = AML_I2C_SPPED_400K,

		/* i2c_ao */
		.master_ao_pinmux = {
			.sda_reg    = (unsigned long)MESON_I2C_AO_M0_SDA_GPIOAO_2_REG,
#ifdef CONFIG_SYS_I2C_AML_HAS_MASK
			.sda_mask   = MESON_I2C_AO_M0_SDA_GPIOAO_2_MASK,
#endif
			.sda_bit    = MESON_I2C_AO_M0_SDA_GPIOAO_2_BIT,

			.scl_reg    = (unsigned long)MESON_I2C_AO_M0_SCL_GPIOAO_3_REG,
#ifdef CONFIG_SYS_I2C_AML_HAS_MASK
			.scl_mask   = MESON_I2C_AO_M0_SCL_GPIOAO_3_MASK,
#endif
			.scl_bit    = MESON_I2C_AO_M0_SCL_GPIOAO_3_BIT,
		},
	},
	{
		.wait_count         = 1000000,
		.wait_ack_interval  = 5,
		.wait_read_interval = 5,
		.wait_xfer_interval = 5,
		.master_no          = AML_I2C_MASTER_A,
		.use_pio            = 0,
		.master_i2c_speed   = AML_I2C_SPPED_400K,

		/* i2c0 */
		.master_a_pinmux = {
			.sda_reg    = (unsigned long)MESON_I2C_EE_M0_SDA_GPIOZ_7_REG,
#ifdef CONFIG_SYS_I2C_AML_HAS_MASK
			.sda_mask   = MESON_I2C_EE_M0_SDA_GPIOZ_7_MASK,
#endif
			.sda_bit    = MESON_I2C_EE_M0_SDA_GPIOZ_7_BIT,

			.scl_reg    = (unsigned long)MESON_I2C_EE_M0_SCL_GPIOZ_8_REG,
#ifdef CONFIG_SYS_I2C_AML_HAS_MASK
			.scl_mask   = MESON_I2C_EE_M0_SCL_GPIOZ_8_MASK,
#endif
			.scl_bit    = MESON_I2C_EE_M0_SCL_GPIOZ_8_BIT,
		},
	},
	{
		.wait_count         = 1000000,
		.wait_ack_interval  = 5,
		.wait_read_interval = 5,
		.wait_xfer_interval = 5,
		.master_no          = AML_I2C_MASTER_D,
		.use_pio            = 0,
		.master_i2c_speed   = AML_I2C_SPPED_400K,
		/* i2c3 */
		.master_d_pinmux = {
			.sda_reg    = (unsigned long)MESON_I2C_EE_M3_SDA_GPIOA_14_REG,
#ifdef CONFIG_SYS_I2C_AML_HAS_MASK
			.sda_mask   = MESON_I2C_EE_M3_SDA_GPIOA_14_MASK,
#endif
			.sda_bit    = MESON_I2C_EE_M3_SDA_GPIOA_14_BIT,

			.scl_reg    = (unsigned long)MESON_I2C_EE_M3_SCL_GPIOA_15_REG,
#ifdef CONFIG_SYS_I2C_AML_HAS_MASK
			.scl_mask   = MESON_I2C_EE_M3_SCL_GPIOA_15_MASK,
#endif
			.scl_bit    = MESON_I2C_EE_M3_SCL_GPIOA_15_BIT,
		},
	},
	/* sign of end */
	{.master_i2c_speed=0},
};

static void board_i2c_init(void)
{
	extern void aml_i2c_set_ports(struct aml_i2c_platform *i2c_plat);
	aml_i2c_set_ports(g_aml_i2c_plat);

	udelay(10);
}

#endif

#if defined(CONFIG_BOARD_EARLY_INIT_F)
int board_early_init_f(void){
	/*add board early init function here*/
	return 0;
}
#endif

#ifdef CONFIG_USB_XHCI_AMLOGIC_V2
#include <asm/arch/usb-v2.h>
#include <asm/arch/gpio.h>
#define CONFIG_GXL_USB_U2_PORT_NUM	2

#ifdef CONFIG_USB_XHCI_AMLOGIC_USB3_V2
#define CONFIG_GXL_USB_U3_PORT_NUM	1
#else
#define CONFIG_GXL_USB_U3_PORT_NUM	0
#endif

static void gpio_set_vbus_power(char is_power_on)
{
	int ret;

	ret = gpio_request(CONFIG_USB_GPIO_PWR,
		CONFIG_USB_GPIO_PWR_NAME);
	if (ret && ret != -EBUSY) {
		printf("gpio: requesting pin %u failed\n",
			CONFIG_USB_GPIO_PWR);
		return;
	}

	if (is_power_on) {
		gpio_direction_output(CONFIG_USB_GPIO_PWR, 1);
	} else {
		gpio_direction_output(CONFIG_USB_GPIO_PWR, 0);
	}
}

struct amlogic_usb_config g_usb_config_GXL_skt={
	CONFIG_GXL_XHCI_BASE,
	USB_ID_MODE_HARDWARE,
	gpio_set_vbus_power,//gpio_set_vbus_power, //set_vbus_power
	CONFIG_GXL_USB_PHY2_BASE,
	CONFIG_GXL_USB_PHY3_BASE,
	CONFIG_GXL_USB_U2_PORT_NUM,
	CONFIG_GXL_USB_U3_PORT_NUM,
	.usb_phy2_pll_base_addr = {
		CONFIG_USB_PHY_20,
		CONFIG_USB_PHY_21,
	}
};

#endif /*CONFIG_USB_XHCI_AMLOGIC*/

#ifdef CONFIG_AML_HDMITX20
static void hdmi_tx_set_hdmi_5v(void)
{
}
#endif

/*
 * mtd nand partition table, only care the size!
 * offset will be calculated by nand driver.
 */
#ifdef CONFIG_AML_MTD
static struct mtd_partition normal_partition_info[] = {
#ifdef CONFIG_DISCRETE_BOOTLOADER
    /* MUST NOT CHANGE this part unless u know what you are doing!
     * inherent parition for descrete bootloader to store fip
     * size is determind by TPL_SIZE_PER_COPY*TPL_COPY_NUM
     * name must be same with TPL_PART_NAME
     */
    {
        .name = "tpl",
        .offset = 0,
        .size = 0,
    },
#endif
    {
        .name = "fts",
        .offset = 0,
        .size = 1*SZ_1M,
    },
    {
        .name = "factory",
        .offset = 0,
        .size = 8*SZ_1M,
    },
    {
        .name = "recovery",
        .offset = 0,
        .size = 16*SZ_1M,
    },
    {
        .name = "boot",
        .offset = 0,
        .size = 16*SZ_1M,
    },
    {
        .name = "system",
        .offset = 0,
        .size = 220*SZ_1M,
    },
    /* last partition get the rest capacity */
    {
        .name = "cache",
        .offset = MTDPART_OFS_APPEND,
        .size = MTDPART_SIZ_FULL,
    },
};
struct mtd_partition *get_aml_mtd_partition(void)
{
	return normal_partition_info;
}
int get_aml_partition_count(void)
{
	return ARRAY_SIZE(normal_partition_info);
}
#endif /* CONFIG_AML_MTD */

#ifdef CONFIG_AML_SPIFC
/*
 * BOOT_3: NOR_HOLDn:reg0[15:12]=3
 * BOOT_4: NOR_D:reg0[19:16]=3
 * BOOT_5: NOR_Q:reg0[23:20]=3
 * BOOT_6: NOR_C:reg0[27:24]=3
 * BOOT_7: NOR_WPn:reg0[31:28]=3
 * BOOT_14: NOR_CS:reg1[27:24]=3
 */
#define SPIFC_NUM_CS 1
static int spifc_cs_gpios[SPIFC_NUM_CS] = {54};

static int spifc_pinctrl_enable(void *pinctrl, bool enable)
{
	unsigned int val;

	val = readl(P_PERIPHS_PIN_MUX_0);
	val &= ~(0xfffff << 12);
	if (enable)
		val |= 0x33333 << 12;
	writel(val, P_PERIPHS_PIN_MUX_0);

	val = readl(P_PERIPHS_PIN_MUX_1);
	val &= ~(0xf << 24);
	writel(val, P_PERIPHS_PIN_MUX_1);
	return 0;
}

static const struct spifc_platdata spifc_platdata = {
	.reg = 0xffd14000,
	.mem_map = 0xf6000000,
	.pinctrl_enable = spifc_pinctrl_enable,
	.num_chipselect = SPIFC_NUM_CS,
	.cs_gpios = spifc_cs_gpios,
};

U_BOOT_DEVICE(spifc) = {
	.name = "spifc",
	.platdata = &spifc_platdata,
};
#endif /* CONFIG_AML_SPIFC */

extern void aml_pwm_cal_init(int mode);

int board_init(void)
{
    CPU_GPU_Voltage_init();
    panel_detect_init();
    //Please keep CONFIG_AML_V2_FACTORY_BURN at first place of board_init
    //As NOT NEED other board init If USB BOOT MODE
#ifdef CONFIG_AML_V2_FACTORY_BURN
	if ((0x1b8ec003 != readl(P_PREG_STICKY_REG2)) && (0x1b8ec004 != readl(P_PREG_STICKY_REG2))) {
				aml_try_factory_usb_burning(0, gd->bd);
	}
#endif// #ifdef CONFIG_AML_V2_FACTORY_BURN
#ifdef CONFIG_USB_XHCI_AMLOGIC_V2
	board_usb_pll_disable(&g_usb_config_GXL_skt);
	board_usb_init(&g_usb_config_GXL_skt,BOARD_USB_MODE_HOST);
#endif /*CONFIG_USB_XHCI_AMLOGIC*/

#ifdef CONFIG_SYS_I2C_AML
	board_i2c_init();
#endif

#if 0
	aml_pwm_cal_init(0);
#endif//
#ifdef CONFIG_AML_NAND
	extern int amlnf_init(unsigned char flag);
	amlnf_init(0);
#endif

	enable_backlight();
	return 0;
}

#ifdef CONFIG_BOARD_LATE_INIT
int board_late_init(void)
{
		//update env before anyone using it
		run_command("get_rebootmode; echo reboot_mode=${reboot_mode}; "\
						"if test ${reboot_mode} = factory_reset; then "\
						"defenv_reserv aml_dt;setenv upgrade_step 2;save; fi;", 0);
		run_command("if itest ${upgrade_step} == 1; then "\
						"defenv_reserv; setenv upgrade_step 2; saveenv; fi;", 0);
		run_command("defenv", 0);
		run_command("run detect_panel", 0);
#if 0
		/*add board late init function here*/
#ifndef DTB_BIND_KERNEL
		int ret;
		ret = run_command("store dtb read $dtb_mem_addr", 1);
        if (ret) {
				printf("%s(): [store dtb read $dtb_mem_addr] fail\n", __func__);
#ifdef CONFIG_DTB_MEM_ADDR
				char cmd[64];
				printf("load dtb to %x\n", CONFIG_DTB_MEM_ADDR);
				sprintf(cmd, "store dtb read %x", CONFIG_DTB_MEM_ADDR);
				ret = run_command(cmd, 1);
                if (ret) {
						printf("%s(): %s fail\n", __func__, cmd);
				}
#endif
		}
#elif defined(CONFIG_DTB_MEM_ADDR)
		{
				char cmd[128];
				int ret;
                if (!getenv("dtb_mem_addr")) {
						sprintf(cmd, "setenv dtb_mem_addr 0x%x", CONFIG_DTB_MEM_ADDR);
						run_command(cmd, 0);
				}
				sprintf(cmd, "imgread dtb boot ${dtb_mem_addr}");
				ret = run_command(cmd, 0);
                if (ret) {
						printf("%s(): cmd[%s] fail, ret=%d\n", __func__, cmd, ret);
				}
		}
#endif// #ifndef DTB_BIND_KERNEL

		/* load unifykey */
		run_command("keyunify init 0x1234", 0);
#endif
#ifdef CONFIG_AML_VPU
	vpu_probe();
#endif
	vpp_init();
#ifdef CONFIG_AML_HDMITX20
	hdmi_tx_set_hdmi_5v();
	hdmi_tx_init();
#endif
#ifdef CONFIG_AML_CVBS
	run_command("cvbs init", 0);
#endif
#ifdef CONFIG_AML_LCD
	lcd_probe();
#endif

#ifdef CONFIG_AML_V2_FACTORY_BURN
	if (0x1b8ec003 == readl(P_PREG_STICKY_REG2))
		aml_try_factory_usb_burning(1, gd->bd);
		aml_try_factory_sdcard_burning(0, gd->bd);
#endif// #ifdef CONFIG_AML_V2_FACTORY_BURN
	return 0;
}
#endif

#ifdef CONFIG_AML_TINY_USBTOOL
int usb_get_update_result(void)
{
	unsigned long upgrade_step;
	upgrade_step = simple_strtoul (getenv ("upgrade_step"), NULL, 16);
	printf("upgrade_step = %d\n", (int)upgrade_step);
	if (upgrade_step == 1)
	{
		run_command("defenv", 1);
		run_command("setenv upgrade_step 2", 1);
		run_command("saveenv", 1);
		return 0;
	}
	else
	{
		return -1;
	}
}
#endif

phys_size_t get_effective_memsize(void)
{
	// >>16 -> MB, <<20 -> real size, so >>16<<20 = <<4
#if defined(CONFIG_SYS_MEM_TOP_HIDE)
	return (((readl(AO_SEC_GP_CFG0)) & 0xFFFF0000) << 4) - CONFIG_SYS_MEM_TOP_HIDE;
#else
	return (((readl(AO_SEC_GP_CFG0)) & 0xFFFF0000) << 4);
#endif
}

#ifdef CONFIG_MULTI_DTB
int checkhw(char * name)
{
	/*
	 * read board hw id
	 * set and select the dts according the board hw id.
	 *
	 * hwid = 1	p321 v1
	 * hwid = 2	p321 v2
	 */
	unsigned int hwid = 1;
	char loc_name[64] = {0};

	/* read hwid */
	hwid = (readl(P_AO_SEC_GP_CFG0) >> 8) & 0xFF;

	printf("checkhw:  hwid = %d\n", hwid);


	switch (hwid) {
		case 1:
			strcpy(loc_name, "txl_p321_v1\0");
			break;
		case 2:
			strcpy(loc_name, "txl_p321_v2\0");
			break;
		default:
			strcpy(loc_name, "txl_p321_v1");
			break;
	}
	strcpy(name, loc_name);
	setenv("aml_dt", loc_name);
	return 0;
}
#endif