)]}'
{
  "commit": "93cedc71647b4b72ac9b48e11997eb2f91645001",
  "tree": "f2a40f94836d6c79f26d7d4dea94aa323ae477bd",
  "parents": [
    "2903ad33a71251a3a87485b5b185852c8998f209"
  ],
  "author": {
    "name": "James Yang",
    "email": "James.Yang@freescale.com",
    "time": "Tue Jan 12 15:50:18 2010 -0600"
  },
  "committer": {
    "name": "Kumar Gala",
    "email": "galak@kernel.crashing.org",
    "time": "Mon Jan 25 22:13:25 2010 -0600"
  },
  "message": "ppc/p4080: Fix mask width of RCW fields MEM_PLL_RAT, SYS_PLL_RAT\n\nThe masks for MEM_PLL_RAT and SYS_PLL_RAT should have been 5-bits\ninstead of 4.\n\nSigned-off-by: James Yang \u003cJames.Yang@freescale.com\u003e\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "2103e2edf1192fcaddfadaa0b3dc786a8956c3e0",
      "old_mode": 33188,
      "old_path": "cpu/mpc85xx/speed.c",
      "new_id": "8dab8d1cf240ef1ab81d17094263cb81eb5945b9",
      "new_mode": 33188,
      "new_path": "cpu/mpc85xx/speed.c"
    }
  ]
}