)]}'
{
  "commit": "9b3ba24f18900633a394416cc056c44a1a6eb754",
  "tree": "f58e3b0801f00356509af60e415df9a000411329",
  "parents": [
    "ded58f4153923dfff16d2f96495bd7acf1f7e10e"
  ],
  "author": {
    "name": "Paul Gortmaker",
    "email": "paul.gortmaker@windriver.com",
    "time": "Fri Sep 18 19:08:41 2009 -0400"
  },
  "committer": {
    "name": "Kumar Gala",
    "email": "galak@kernel.crashing.org",
    "time": "Thu Sep 24 12:05:00 2009 -0500"
  },
  "message": "sbc8548: enable access to second bank of flash\n\nThe sbc8548 has a 64MB SODIMM flash module off of CS6 that\npreviously wasn\u0027t enumerated by u-boot.  There were already\nBR6/OR6 settings for it [used by cpu_init_f()] but there\nwas no TLB entry and it wasn\u0027t in the list of flash banks\nreported to u-boot.\n\nThe location of the 64MB flash is \"pulled back\" 8MB from\na 64MB boundary, in order to allow address space for the\n8MB boot flash that is at the end of 32 bit address space.\nThis means creating two 4MB TLB entries for the 8MB chunk,\nand then expanding the original boot flash entry to 64MB\nin order to cover the 8MB boot flash and the remainder\n(56MB) of the user flash.\n\nSigned-off-by: Paul Gortmaker \u003cpaul.gortmaker@windriver.com\u003e\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "ddcb532eefd2f3dc5e236b99eb80e2904db540ed",
      "old_mode": 33188,
      "old_path": "board/sbc8548/tlb.c",
      "new_id": "a0b4e36e7b030fb47943ce40ff93ea42bce3b002",
      "new_mode": 33188,
      "new_path": "board/sbc8548/tlb.c"
    },
    {
      "type": "modify",
      "old_id": "3d05afbba16b79fd783abe7557cc1e4ea08b4005",
      "old_mode": 33188,
      "old_path": "include/configs/sbc8548.h",
      "new_id": "5c1411f6689ee54137267e37e1d644afe6ce8f9b",
      "new_mode": 33188,
      "new_path": "include/configs/sbc8548.h"
    }
  ]
}