tree f261253dd57b44c56705c5df2311fb7edbb013eb
parent b1c2a7ae32b6c5dd1dcb7cb29c862af01523ba36
author Gerlando Falauto <gerlando.falauto@keymile.com> 1392306180 +0100
committer Albert ARIBAUD <albert.u.boot@aribaud.net> 1392309936 +0100

arm/km: introduce kmsugp1 target

KMSUGP1 is from a u-boot perspective (almost) identical to KMNUSA.
The only difference is that the PCIe reset is connected to Kirkwood pin
MPP7_PEX_RST_OUTn, we use a dedicated config flag KM_PCIE_RESET_MPP7.
Such pin should theoretically be handled by the PCIe subsystem
automatically, but this turned out not to be the case.
So simply configure this PIN as a GPIO and issue a pulse manually.

Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com>
Cc: Karlheinz Jerg <karlheinz.jerg@keymile.com>
Cc: Valentin Longchamp <valenting.longchamp@keymile.com>
Cc: Holger Brunck <holger.brunck@keymile.com>
Acked-by: Valentin Longchamp <valentin.longchamp@keymile.com>