)]}'
{
  "commit": "9f798766aa85e62eb8fa8c721e148df609b78137",
  "tree": "8c39fec8978f1f2dc98be422b3a9d0aad1211764",
  "parents": [
    "afe9fa59cb63b4f9d16bf01c93eb212f25a38c2a"
  ],
  "author": {
    "name": "Eugene O\u0027Brien",
    "email": "eugene.obrien@advantechamt.com",
    "time": "Tue Oct 23 08:29:10 2007 +0200"
  },
  "committer": {
    "name": "Stefan Roese",
    "email": "sr@denx.de",
    "time": "Wed Oct 31 21:20:51 2007 +0100"
  },
  "message": "ppc4xx: Fixed offset of refresh rate type for Bamboo on-board DDR SDRAM\n\nThis patch also adds a note to the fixed DDR setup for Bamboo NAND booting:\n\nNote:\nAs found out by Eugene O\u0027Brien \u003ceugene.obrien@advantechamt.com\u003e, the fixed\nDDR setup has problems (U-Boot crashes randomly upon TFTP), when the DIMM\nmodules are still plugged in. So it is recommended to remove the DIMM\nmodules while using the NAND booting code with the fixed SDRAM setup!\n\nSigned-off-by: Eugene O\u0027Brien \u003ceugene.obrien@advantechamt.com\u003e\nSigned-off-by: Stefan Roese \u003csr@denx.de\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "00c793afd0111ffcadbebafbc6eb4e3afaf114c9",
      "old_mode": 33188,
      "old_path": "board/amcc/bamboo/bamboo.c",
      "new_id": "c4eace5804940ddb593e92ac5e0655d1a234ddda",
      "new_mode": 33188,
      "new_path": "board/amcc/bamboo/bamboo.c"
    },
    {
      "type": "modify",
      "old_id": "4f09072df08942fe3f144230e42e11cc02f9bf3f",
      "old_mode": 33188,
      "old_path": "nand_spl/board/amcc/bamboo/sdram.c",
      "new_id": "ac77d066cb162f80559eafb4074785e6784bcd37",
      "new_mode": 33188,
      "new_path": "nand_spl/board/amcc/bamboo/sdram.c"
    }
  ]
}