)]}'
{
  "commit": "a3c3fabb0f65455068e01197e16927f0589beaa2",
  "tree": "1b6d04f49c674210f8f6e6abe83627d3d088b846",
  "parents": [
    "c176dd0442c40d4e98c86848091f628707f9c50a"
  ],
  "author": {
    "name": "Matt Porter",
    "email": "mporter@ti.com",
    "time": "Mon May 07 16:49:21 2012 +0000"
  },
  "committer": {
    "name": "Albert ARIBAUD",
    "email": "albert.u.boot@aribaud.net",
    "time": "Tue May 15 08:31:41 2012 +0200"
  },
  "message": "arm, omap3: fix warm reset serial output on OMAP36xx/AM/DM37xx\n\nIn warm reset conditions on OMAP36xx/AM/DM37xx the rom code\nincorrectly sets the DPLL4 clock input divider to /6.5 which\nis an invalid value unless the input clock is 13MHz. When a JTAG\nemulator is attached, a warm reset is necessary after the emulator\ngains control of the process. This results in a loss of serial\noutput due to the invalid DPLL4 settings.\n\nThis patch fixes the issue by resetting the DPLL4 clock input\ndivider to /1 when the input clock is not 13MHz. AM/DM37x TRM\nsection 3.5.3.3.3.2.1 specifies that the /6.5 setting is only\nused when the input clock is 13MHz.\n\nSigned-off-by: Matt Porter \u003cmporter@ti.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "567817e0ec3b062c3ee2a66c901b14ab1b44a8b2",
      "old_mode": 33188,
      "old_path": "arch/arm/cpu/armv7/omap3/clock.c",
      "new_id": "09c51f62aad0cf1f64b3ba171a235f546bdc139d",
      "new_mode": 33188,
      "new_path": "arch/arm/cpu/armv7/omap3/clock.c"
    }
  ]
}