)]}'
{
  "commit": "a724a9b40c7fbeb6ade193ca52321b441eaecb4e",
  "tree": "a3a4724c6d0aa340586400d3e563e0684c83c167",
  "parents": [
    "454a6cf8d498f70d2b3e18f07837603eb24b12d4"
  ],
  "author": {
    "name": "Larry Johnson",
    "email": "lrj@arlinx.com",
    "time": "Sat Oct 27 12:48:15 2007 -0400"
  },
  "committer": {
    "name": "Stefan Roese",
    "email": "sr@denx.de",
    "time": "Thu Dec 27 19:35:33 2007 +0100"
  },
  "message": "Fix/enhance ECC POST for 440EPx/GRx\n\nThis patch allows the ECC POST to be used for different boards with the\nPPC440 Denali SDRAM controller.  Modifications include skipping the test\nif ECC is not enabled (as for non-ECC DIMMs) and adding synchronization\nto prevent timing errors.\n\nSigned-off-by: Larry Johnson \u003clrj@acm.org\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "f1034dac249c12dbda31341816a4d1fb7704ba87",
      "old_mode": 33188,
      "old_path": "post/cpu/ppc4xx/Makefile",
      "new_id": "e3f44b7774be4f66a58a2deee954ab7a0cc9c372",
      "new_mode": 33188,
      "new_path": "post/cpu/ppc4xx/Makefile"
    },
    {
      "type": "modify",
      "old_id": "3fa3ba62435747b338078a2bd0bce3559386fd8d",
      "old_mode": 33188,
      "old_path": "post/cpu/ppc4xx/denali_ecc.c",
      "new_id": "47f529ef4d0031bbf265db626b9e8c82d137e4b4",
      "new_mode": 33188,
      "new_path": "post/cpu/ppc4xx/denali_ecc.c"
    }
  ]
}