diff --git a/board/khadas/kvim3/firmware/timing.c b/board/khadas/kvim3/firmware/timing.c
index 6feb221..39bdbbb 100644
--- a/board/khadas/kvim3/firmware/timing.c
+++ b/board/khadas/kvim3/firmware/timing.c
@@ -471,6 +471,8 @@
 #define GPIO_O_EN_N_REG3	((0xff634400 + (0x19 << 2)))
 #define GPIO_O_REG3		((0xff634400 + (0x1a << 2)))
 #define GPIO_I_REG3		((0xff634400 + (0x1b << 2)))
+#define GPIO_O_EN_N_REG1	((0xff634400 + (0x13 << 2)))
+#define GPIO_O_REG1		((0xff634400 + (0x14 << 2)))
 #define AO_PIN_MUX_REG0	((0xff800000 + (0x05 << 2)))
 #define AO_PIN_MUX_REG1	((0xff800000 + (0x06 << 2)))
 
@@ -511,13 +513,13 @@
 	/* Enable 5V_EN */
 	{GPIO_O_EN_N_REG3,    (1 << 8),                (1 << 8),     0, BL2_INIT_STAGE_1, 0},
 	{GPIO_O_REG3,         (1 << 8),                (1 << 8),   0, BL2_INIT_STAGE_1, 0},
-	/* Enable CPUA ,control by GPIOAO_4 */
-	{AO_GPIO_O_EN_N,    (0 << 4),                (1 << 4),     0, BL2_INIT_STAGE_1, 0},
-	{AO_GPIO_O,         (1 << 4),                (1 << 4),   0, BL2_INIT_STAGE_1, 0},
+	/* Enable CPUA ,control by GPIOC_7 */
+	{GPIO_O_EN_N_REG1,    (1 << 7),                (1 << 7),     0, BL2_INIT_STAGE_1, 0},
+	{GPIO_O_REG1,         (1 << 7),                (1 << 7),   0, BL2_INIT_STAGE_1, 0},
 	/* Enable VCCK */
 	{AO_SEC_REG0,         (1 << 0),                (1 << 0),     0, BL2_INIT_STAGE_1, 0},
 	{AO_GPIO_O,           (1 << 31),               (1 << 31),    0, BL2_INIT_STAGE_1, 0},
 	/* Init sys led*/
-	{AO_GPIO_O_EN_N,      (0 << 11),               (1 << 11),    0, BL2_INIT_STAGE_1, 0},
-	{AO_GPIO_O,           (1 << 11),               (1 << 11),    0, BL2_INIT_STAGE_1, 0},
+	{AO_GPIO_O_EN_N,      (0 << 4),               (1 << 4),    0, BL2_INIT_STAGE_1, 0},
+	{AO_GPIO_O,           (1 << 4),               (1 << 4),    0, BL2_INIT_STAGE_1, 0},
 };
diff --git a/board/khadas/kvim3l/firmware/timing.c b/board/khadas/kvim3l/firmware/timing.c
index 030126f..9a8eab4 100644
--- a/board/khadas/kvim3l/firmware/timing.c
+++ b/board/khadas/kvim3l/firmware/timing.c
@@ -514,6 +514,6 @@
 	{AO_SEC_REG0,         (1 << 0),                0xffffffff,   0, BL2_INIT_STAGE_1, 0},
 	{AO_GPIO_O,           (1 << 31),               0xffffffff,   0, BL2_INIT_STAGE_1, 0},
 	/* Init sys led*/
-	{AO_GPIO_O_EN_N,      (0 << 11),               (1 << 11),    0, BL2_INIT_STAGE_1, 0},
-	{AO_GPIO_O,           (1 << 11),               (1 << 11),    0, BL2_INIT_STAGE_1, 0},
+	{AO_GPIO_O_EN_N,      (0 << 4),               (1 << 4),    0, BL2_INIT_STAGE_1, 0},
+	{AO_GPIO_O,           (1 << 4),               (1 << 4),    0, BL2_INIT_STAGE_1, 0},
 };