tree c8e46d7db9d68165341974287f50cab039394fca
parent 2b26201a2aef0b310b7c04702b0dba5dea493f77
author Marek Vasut <marex@denx.de> 1377531923 +0200
committer Jagannadha Sutradharudu Teki <jaganna@xilinx.com> 1377612579 +0530

spi: mxs_spi: Configure chipselect after block reset

The chipselect must be written into the CTRL0 register after the SSP
block is reset, otherwise the block will always use ChipSelect #0.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>