)]}'
{
  "commit": "abf0cd3dff227cfb6e82ad13be62e28e6e89d5df",
  "tree": "40d66a99e64a918c339cd0b197d3f67bb00ac8b7",
  "parents": [
    "ece444b42b71eb5bce34a24ec584573b3c8c4a98"
  ],
  "author": {
    "name": "Graeme Russ",
    "email": "graeme.russ@gmail.com",
    "time": "Tue Feb 24 21:13:40 2009 +1100"
  },
  "committer": {
    "name": "Wolfgang Denk",
    "email": "wd@denx.de",
    "time": "Fri Mar 20 22:39:13 2009 +0100"
  },
  "message": "Rewrite i386 interrupt handling\n\nRewrite interrupt handling functionality for the i386 port. Separated\nfunctionality into separate CPU and Architecture components.\n\nIt appears as if the i386 interrupt handler functionality was intended\nto allow multiple handlers to be installed for a given interrupt.\nUnfortunately, this functionality was not fully implemented and also\nhad the problem that irq_free_handler() does not allow the passing\nof the handler function pointer and therefore could never be used to\nfree specific handlers that had been installed for a given IRQ.\n\nThere were also various issues with array bounds not being fully\ntested.\n\nI had two objectives in mind for the new implementation:\n\n1) Keep the implementation as similar as possible to existing\n   implementations. To that end, I have used the leon2/3\n   implementations as the reference\n\n2) Seperate CPU and Architecture specific elements. All specific i386\n   interrupt functionality is now in cpu/i386/ with the high level\n   API and architecture specific code in lib_i386. Functionality\n   specific to the PC/AT architecture (i.e. cascaded i8259 PICs) has\n   been further split out into an individual file to allow for the\n   implementation of the PIC architecture of the SC520 CPU (supports\n   more IRQs)\n\nSigned-off-by: Graeme Russ \u003cgraeme.russ at gmail.com\u003e\n",
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