)]}'
{
  "commit": "bb0dc1084f5dcf1dfd951d320c932d08bccbe429",
  "tree": "ba59aece0acb35211a67f503e25cac3111788fc4",
  "parents": [
    "0151d99d74ec4b8a33133acf94ebcd25d717dfd7"
  ],
  "author": {
    "name": "Ying Zhang",
    "email": "b40530@freescale.com",
    "time": "Fri Aug 16 15:16:11 2013 +0800"
  },
  "committer": {
    "name": "York Sun",
    "email": "yorksun@freescale.com",
    "time": "Tue Aug 20 09:47:26 2013 -0700"
  },
  "message": "powerpc: mpc85xx: Support booting from SD Card with SPL\n\nThe code from the internal on-chip ROM. It loads the final uboot image\ninto DDR, then jump to it to begin execution.\n\nThe SPL\u0027s size is sizeable, the maximum size must not exceed the size of L2\nSRAM. It initializes the DDR through SPD code, and copys final uboot image\nto DDR. So there are two stage uboot images:\n\t* spl_boot, 96KB size. The env variables are copied to L2 SRAM, so that\n\tddr spd code can get the interleaving mode setting in env. It loads\n\tfinal uboot image from offset 96KB.\n\t* final uboot image, size is variable depends on the functions enabled.\n\nSigned-off-by: Ying Zhang \u003cb40530@freescale.com\u003e\nAcked-by: York Sun \u003cyorksun@freescale.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "953ff179006dcf6bd3913657335469cc66c17019",
      "old_mode": 33188,
      "old_path": "README",
      "new_id": "301d1a95cdd9575b520c4aad7a410ca6fdf38084",
      "new_mode": 33188,
      "new_path": "README"
    },
    {
      "type": "modify",
      "old_id": "08188d75e5f12cf5a64f4f40aeae4066186311c6",
      "old_mode": 33188,
      "old_path": "arch/powerpc/cpu/mpc85xx/u-boot-spl.lds",
      "new_id": "85ec74ba94adbfeedef1e339d10f06a3ded6d034",
      "new_mode": 33188,
      "new_path": "arch/powerpc/cpu/mpc85xx/u-boot-spl.lds"
    },
    {
      "type": "modify",
      "old_id": "e958e138dda6c613f747a2b806dc1d58476a83a8",
      "old_mode": 33188,
      "old_path": "arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c",
      "new_id": "56128a7b962ca062c0eab7e878dde4c4bada8041",
      "new_mode": 33188,
      "new_path": "arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "d5043ccb66cff97d964beb9366684d6953e4d1ce",
      "new_mode": 33188,
      "new_path": "doc/README.mpc85xx-sd-spi-boot"
    },
    {
      "type": "modify",
      "old_id": "49e5cb9c2a494de55d097ba85d880348dd5a8bb8",
      "old_mode": 33188,
      "old_path": "drivers/mmc/Makefile",
      "new_id": "bedf833f70dfac17344af3195cfb33582c96ab34",
      "new_mode": 33188,
      "new_path": "drivers/mmc/Makefile"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "25a1dff1b0092595f9e8825e0fff0f17594f6b68",
      "new_mode": 33188,
      "new_path": "drivers/mmc/fsl_esdhc_spl.c"
    },
    {
      "type": "modify",
      "old_id": "4da8db9bed2d1ef0e4f4d4b3460d8689eeeeb9e8",
      "old_mode": 33188,
      "old_path": "drivers/mmc/mmc.c",
      "new_id": "55026759ede4d41cbb26e2096a965e87e9b812b6",
      "new_mode": 33188,
      "new_path": "drivers/mmc/mmc.c"
    },
    {
      "type": "modify",
      "old_id": "2c97398f4eafe84325be0727469266d70be52ecb",
      "old_mode": 33188,
      "old_path": "include/fsl_esdhc.h",
      "new_id": "89bcbd1700ac7b62d4fcc06304177a176180aef3",
      "new_mode": 33188,
      "new_path": "include/fsl_esdhc.h"
    },
    {
      "type": "modify",
      "old_id": "02f4860755820c4f26b04869fdb77a41c4f54e00",
      "old_mode": 33188,
      "old_path": "spl/Makefile",
      "new_id": "a9a8564f62c763ee45ef452fc187679978ce1641",
      "new_mode": 33188,
      "new_path": "spl/Makefile"
    }
  ]
}