)]}'
{
  "commit": "c8b281524bf98ee5a52db7da71bccdea002df3f5",
  "tree": "969e1e223b675ac6df5021e3090d9a18fc9dcbe8",
  "parents": [
    "5a516748a8e003aa80eab259cbf94026a6e30c93"
  ],
  "author": {
    "name": "Liu Gang",
    "email": "Gang.Liu@freescale.com",
    "time": "Tue May 07 16:30:46 2013 +0800"
  },
  "committer": {
    "name": "Andy Fleming",
    "email": "afleming@freescale.com",
    "time": "Thu Jun 20 17:08:48 2013 -0500"
  },
  "message": "powerpc/boot: Change the macro of Boot from SRIO and PCIE master module\n\nCurrently, the macro \"CONFIG_SYS_FSL_SRIO_PCIE_BOOT_MASTER\" can enable\nthe master module of Boot from SRIO and PCIE on a platform. But this\nis not a silicon feature, it\u0027s just a specific booting mode based on\nthe SRIO and PCIE interfaces. So it\u0027s inappropriate to put the macro\ninto the file arch/powerpc/include/asm/config_mpc85xx.h.\n\nChange the macro \"CONFIG_SYS_FSL_SRIO_PCIE_BOOT_MASTER\" to\n\"CONFIG_SRIO_PCIE_BOOT_MASTER\", remove them from\narch/powerpc/include/asm/config_mpc85xx.h file, and add those macros\nin configuration header file of each board which can support the\nmaster module of Boot from SRIO and PCIE.\n\nSigned-off-by: Liu Gang \u003cGang.Liu@freescale.com\u003e\nSigned-off-by: Andy Fleming \u003cafleming@freescale.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "2dd0bc063408f1d0aae3ed1450165d783deb845b",
      "old_mode": 33188,
      "old_path": "README",
      "new_id": "983d55ecea2c6a297bbccc38164b1e098d293a96",
      "new_mode": 33188,
      "new_path": "README"
    },
    {
      "type": "modify",
      "old_id": "4067f053757a66cf21e2868ffd0808d40593153f",
      "old_mode": 33188,
      "old_path": "arch/powerpc/cpu/mpc85xx/cpu_init.c",
      "new_id": "099014198172261f35f79b41597bd187a13183a6",
      "new_mode": 33188,
      "new_path": "arch/powerpc/cpu/mpc85xx/cpu_init.c"
    },
    {
      "type": "modify",
      "old_id": "6e6f7dcc3fd927a96383b6b457620f82d1d49296",
      "old_mode": 33188,
      "old_path": "arch/powerpc/cpu/mpc8xxx/srio.c",
      "new_id": "90d1065deb23eb591703226952436d9e09e7824d",
      "new_mode": 33188,
      "new_path": "arch/powerpc/cpu/mpc8xxx/srio.c"
    },
    {
      "type": "modify",
      "old_id": "f1b3c35b35e321615d67fd5f32c22c9ef0fcae86",
      "old_mode": 33188,
      "old_path": "arch/powerpc/include/asm/config_mpc85xx.h",
      "new_id": "86035d9ab4453c5dc325c0e6922e62c81efdd0dd",
      "new_mode": 33188,
      "new_path": "arch/powerpc/include/asm/config_mpc85xx.h"
    },
    {
      "type": "modify",
      "old_id": "77ac1f7c7b9a1a8452c064dc6abfd39fb3785ec8",
      "old_mode": 33188,
      "old_path": "drivers/pci/fsl_pci_init.c",
      "new_id": "621c899120af29bb4a77adbbc75423075d70f9b9",
      "new_mode": 33188,
      "new_path": "drivers/pci/fsl_pci_init.c"
    },
    {
      "type": "modify",
      "old_id": "9cd3a7cb34d7118233422a6f6425d11457298556",
      "old_mode": 33188,
      "old_path": "include/configs/P2041RDB.h",
      "new_id": "4ea87173682f1aa9b9b9147917be2d76e254b2e4",
      "new_mode": 33188,
      "new_path": "include/configs/P2041RDB.h"
    },
    {
      "type": "modify",
      "old_id": "ce8f9b0b2eba190c0e11a41bed6a4c054945fc89",
      "old_mode": 33188,
      "old_path": "include/configs/P3041DS.h",
      "new_id": "dd2b9c34e4f3152d75f8fd396cca086f36cb4656",
      "new_mode": 33188,
      "new_path": "include/configs/P3041DS.h"
    },
    {
      "type": "modify",
      "old_id": "53979dddf26d10c7e69da2e4418f873dfc6bb29f",
      "old_mode": 33188,
      "old_path": "include/configs/P4080DS.h",
      "new_id": "48acee4993f1f55fbf6049d9db01dd7038bbb71c",
      "new_mode": 33188,
      "new_path": "include/configs/P4080DS.h"
    },
    {
      "type": "modify",
      "old_id": "778230d3356c13ced57cc25bde618650f6c9c190",
      "old_mode": 33188,
      "old_path": "include/configs/P5020DS.h",
      "new_id": "d1e27c42d4c9667b268a4f36b140dada5ed5f8f4",
      "new_mode": 33188,
      "new_path": "include/configs/P5020DS.h"
    }
  ]
}
