)]}'
{
  "commit": "cba4b1809f043bf85c806e5a4e342f62bd5ded45",
  "tree": "69a063b972d4ac839666a9b2c79203843d63936c",
  "parents": [
    "98a48c5de545e5a5eedba0a868024ef0d4ae5347"
  ],
  "author": {
    "name": "Aneesh V",
    "email": "aneesh@ti.com",
    "time": "Tue Aug 16 04:33:05 2011 +0000"
  },
  "committer": {
    "name": "Albert ARIBAUD",
    "email": "albert.u.boot@aribaud.net",
    "time": "Sun Sep 04 11:36:16 2011 +0200"
  },
  "message": "arm: do not force d-cache enable on all boards\n\nc2dd0d45540397704de9b13287417d21049d34c6 added dcache_enable()\nto board_init_r(). This enables d-cache for all ARM boards.\nAs a result some of the arm boards that are not cache-ready\nare broken. Revert this change and allow platform code to\ntake the decision on d-cache enabling.\n\nAlso add some documentation for cache usage in ARM.\n\nSigned-off-by: Aneesh V \u003caneesh@ti.com\u003e\n",
  "tree_diff": [
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