)]}'
{
  "commit": "ccf8f824ef67df028dedb29f8ea5d71a5a88d895",
  "tree": "b051a88092123b0877caa5aa0e5641282c2b99be",
  "parents": [
    "2e0e5271aac917812a76c72030a2b2c6f1d3387d"
  ],
  "author": {
    "name": "Shinya Kuribayashi",
    "email": "skuribay@ruby.dti.ne.jp",
    "time": "Tue Mar 25 21:30:06 2008 +0900"
  },
  "committer": {
    "name": "Shinya Kuribayashi",
    "email": "skuribay@ruby.dti.ne.jp",
    "time": "Tue Mar 25 21:30:06 2008 +0900"
  },
  "message": "[MIPS] Implement flush_cache()\n\nWe do Hit_Writeback_Inv_D and Hit_Invalidate_I. You might think that you\ndon\u0027t need to do Hit_Invalidate_I, but flush_cache() needs it since this\nfunction is used not only in U-Boot specfic programs but also at loading\ntarget binaries.\n\nSigned-off-by: Shinya Kuribayashi \u003cskuribay@ruby.dti.ne.jp\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "7559ac657f40384dded344006b8a7076e5b68c0e",
      "old_mode": 33188,
      "old_path": "cpu/mips/cpu.c",
      "new_id": "de70c4d6142a430e9fce4d83ce0453abbcded218",
      "new_mode": 33188,
      "new_path": "cpu/mips/cpu.c"
    }
  ]
}