)]}'
{
  "commit": "f83b7f9e8a5d1334e24506ea5953dd871596ea8a",
  "tree": "ca8a545a60fa8fbc6f912ff6286ea1bd78c4b0a1",
  "parents": [
    "36fab997d85d89ee7fd2c7fd6057fab786d556aa"
  ],
  "author": {
    "name": "Sandeep Paulraj",
    "email": "s-paulraj@ti.com",
    "time": "Mon Aug 10 13:27:56 2009 -0400"
  },
  "committer": {
    "name": "Scott Wood",
    "email": "scottwood@freescale.com",
    "time": "Wed Aug 26 15:37:03 2009 -0500"
  },
  "message": "MTD:NAND: ADD new ECC mode NAND_ECC_HW_OOB_FIRST\n\nThis patch adds the new mode NAND_ECC_HW_OOB_FIRST in the nand code to\nsupport 4-bit ECC on TI DaVinci devices with large page (up to 2K) NAND\nchips.  This ECC mode is similar to NAND_ECC_HW, with the exception of\nread_page API that first reads the OOB area, reads the data in chunks,\nfeeds the ECC from OOB area to the ECC hw engine and perform any\ncorrection on the data as per the ECC status reported by the engine.\n\nThis patch has been accepted by Andrew Morton and can be found at\n\nhttp://userweb.kernel.org/~akpm/mmotm/broken-out/mtd-nand-add-new-ecc-mode-ecc_hw_oob_first.patch\n\nSigned-off-by: Sandeep Paulraj \u003cs-paulraj@ti.com\u003e\nSigned-off-by: Sneha Narnakaje \u003cnsnehaprabha@ti.com\u003e\nSigned-off-by: Scott Wood \u003cscottwood@freescale.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "ca026286f20ac562bfe249ebca14aa629998b7fb",
      "old_mode": 33188,
      "old_path": "drivers/mtd/nand/nand_base.c",
      "new_id": "426bb95e9e9f10f62b13e2877428370158daa3d9",
      "new_mode": 33188,
      "new_path": "drivers/mtd/nand/nand_base.c"
    },
    {
      "type": "modify",
      "old_id": "d6aa392ff42670e6143371bfda53e79265e35d4c",
      "old_mode": 33188,
      "old_path": "include/linux/mtd/nand.h",
      "new_id": "cb7c19a4392bdd49151aa09595520eba31b97e0d",
      "new_mode": 33188,
      "new_path": "include/linux/mtd/nand.h"
    }
  ]
}