)]}'
{
  "commit": "f8bc7bb5a79b392db3af9f62b63caefab8afbc31",
  "tree": "9ee756eebfdcab351f4a00a52fa4505b5e2f0feb",
  "parents": [
    "360275b362e50f480b09c7c8770019ea4287afad"
  ],
  "author": {
    "name": "Kumar Gala",
    "email": "galak@kernel.crashing.org",
    "time": "Tue Aug 30 17:40:11 2011 -0500"
  },
  "committer": {
    "name": "Kumar Gala",
    "email": "galak@kernel.crashing.org",
    "time": "Thu Sep 29 19:01:06 2011 -0500"
  },
  "message": "powerpc/85xx: Refactor P2041RDB to use common p_corenet files\n\nThe P2041RDB has almost identical setup for TLB, LAWS, and PCI with\nother P-Series CoreNet platforms.\n\nThe only difference between P2041RDB \u0026 P3041DS/P4080DS/P5020DS is the\nCPLD vs PIXIS FPGA which we can handle via some simple #ifdefs in the\nTLB and LAW setup tables.\n\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n",
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