)]}'
{
  "commit": "fa7b1c07e9371aea8f87ee6d3c2ea5564bd8cc8d",
  "tree": "d379de1b2b11e4d21ac02fd54b06c4e80930e78f",
  "parents": [
    "bf29e0ea0af03d593c64614136acc723a7a022a2"
  ],
  "author": {
    "name": "Lepcha Suchit",
    "email": "Suchit.Lepcha@freescale.com",
    "time": "Thu Oct 16 13:38:00 2008 -0500"
  },
  "committer": {
    "name": "Scott Wood",
    "email": "scottwood@freescale.com",
    "time": "Fri Oct 17 10:39:18 2008 -0500"
  },
  "message": "83xx NAND boot: wait for LTESR[CC]\n\nAt least some revisions of the 8313, and possibly other chips, do not\nwait for all pages of the initial 4K NAND region to be loaded before\nbeginning execution; thus, we wait for it before branching out of the\nfirst NAND page.\n\nThis fixes warm reset problems when booting from NAND on 8313erdb.\n\nSigned-off-by: Scott Wood \u003cscottwood@freescale.com\u003e\nAcked-by: Kim Phillips \u003ckim.phillips@freescale.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "14bfbdade8f7b1a9ddbf9b10e4674b2467b94ec3",
      "old_mode": 33188,
      "old_path": "cpu/mpc83xx/start.S",
      "new_id": "6ff66826224230b9db6a2972560612597c147b4e",
      "new_mode": 33188,
      "new_path": "cpu/mpc83xx/start.S"
    }
  ]
}