[PATCH] Add DDR2 optimization code for Sequoia (440EPx) board

This code will optimize the DDR2 controller setup on a board specific
basis.

Note: This code doesn't work right now on the NAND booting image for the
Sequoia board, since it doesn't fit into the 4kBytes for the SPL image.

Signed-off-by: Stefan Roese <sr@denx.de>

include/configs/sequoia.h

diff --git a/include/configs/sequoia.h b/include/configs/sequoia.h
index 00b9222..e7f0108 100644
--- a/include/configs/sequoia.h
+++ b/include/configs/sequoia.h
@@ -188,7 +188,10 @@
 /*-----------------------------------------------------------------------
  * DDR SDRAM
  *----------------------------------------------------------------------*/
-#define CFG_MBYTES_SDRAM        (256)    /* 256MB			*/
+#define CFG_MBYTES_SDRAM        (256)		/* 256MB			*/
+#if !defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL)
+#define CONFIG_DDR_DATA_EYE			/* use DDR2 optimization	*/
+#endif
 
 /*-----------------------------------------------------------------------
  * I2C