Merge with /home/wd/git/u-boot/testing-NAND/ to add new NAND handling.
diff --git a/common/cmd_jffs2.c b/common/cmd_jffs2.c
index 34920b1..ecadb79 100644
--- a/common/cmd_jffs2.c
+++ b/common/cmd_jffs2.c
@@ -99,11 +99,15 @@
#include <cramfs/cramfs_fs.h>
-/* enable/disable debugging messages */
-#define DEBUG
-#undef DEBUG
+#ifdef CONFIG_NEW_NAND_CODE
+#include <nand.h>
+#endif
-#ifdef DEBUG
+/* enable/disable debugging messages */
+#define DEBUG_JFFS
+#undef DEBUG_JFFS
+
+#ifdef DEBUG_JFFS
# define DEBUGF(fmt, args...) printf(fmt ,##args)
#else
# define DEBUGF(fmt, args...)
@@ -123,7 +127,7 @@
/* this flag needs to be set in part_info struct mask_flags
* field for read-only partitions */
-#define MTD_WRITEABLE 1
+#define MTD_WRITEABLE_CMD 1
#ifdef CONFIG_JFFS2_CMDLINE
/* default values for mtdids and mtdparts variables */
@@ -365,10 +369,9 @@
{
#if defined(CONFIG_JFFS2_NAND) && (CONFIG_COMMANDS & CFG_CMD_NAND)
/* info for NAND chips */
- extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE];
- struct nand_chip *nand;
+ nand_info_t *nand;
- nand = &nand_dev_desc[id->num];
+ nand = &nand_info[id->num];
if ((unsigned long)(part->offset) % nand->erasesize) {
printf("%s%d: partition (%s) start offset alignment incorrect\n",
@@ -464,7 +467,9 @@
}
}
+#ifndef CONFIG_NEW_NAND_CODE
jffs2_free_cache(part);
+#endif
list_del(&part->link);
free(part);
dev->num_parts--;
@@ -491,7 +496,9 @@
list_for_each_safe(entry, n, head) {
part_tmp = list_entry(entry, struct part_info, link);
+#ifndef CONFIG_NEW_NAND_CODE
jffs2_free_cache(part_tmp);
+#endif
list_del(entry);
free(part_tmp);
}
@@ -646,7 +653,7 @@
/* test for options */
mask_flags = 0;
if (strncmp(p, "ro", 2) == 0) {
- mask_flags |= MTD_WRITEABLE;
+ mask_flags |= MTD_WRITEABLE_CMD;
p += 2;
}
@@ -713,6 +720,7 @@
if (num < CFG_MAX_FLASH_BANKS) {
extern flash_info_t flash_info[];
*size = flash_info[num].size;
+
return 0;
}
@@ -724,8 +732,12 @@
} else if (type == MTD_DEV_TYPE_NAND) {
#if defined(CONFIG_JFFS2_NAND) && (CONFIG_COMMANDS & CFG_CMD_NAND)
if (num < CFG_MAX_NAND_DEVICE) {
+#ifdef CONFIG_NEW_NAND_CODE
+ *size = nand_info[num].size;
+#else
extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE];
*size = nand_dev_desc[num].totlen;
+#endif
return 0;
}
@@ -1169,7 +1181,7 @@
}
/* ro mask flag */
- if (part->mask_flags && MTD_WRITEABLE) {
+ if (part->mask_flags && MTD_WRITEABLE_CMD) {
len = 2;
if (len > maxlen)
goto cleanup;
