Patches by Murray Jensen, 17 Jun 2003:
- Hymod board database mods: add "who" field and new xilinx chip types
- provide new "init_cmd_timeout()" function so code external to
"common/main.c" can use the "reset_cmd_timeout()" function before
entering the main loop
- add DTT support for adm1021 (new file dtt/adm1021.c; config
slightly different. see include/configs/hymod.h for an example
(requires CONFIG_DTT_ADM1021, CONFIG_DTT_SENSORS, and
CFG_DTT_ADM1021 defined)
- add new "eeprom_probe()" function which has similar args and
behaves in a similar way to "eeprom_read()" etc.
- add 8260 FCC ethernet loopback code (new "eth_loopback_test()"
function which is enabled by defining CONFIG_ETHER_LOOPBACK_TEST)
- gdbtools copyright update
- ensure that set_msr() executes the "sync" and "isync" instructions
after the "mtmsr" instruction in cpu/mpc8260/interrupts.c
- 8260 I/O ports fix: Open Drain should be set last when configuring
- add SIU IRQ defines for 8260
- allow LDSCRIPT override and OBJCFLAGS initialization: change to
config.mk to allow board configurations to override the GNU
linker script, selected via the LDSCRIPT, make variable, and to
give an initial value to the OBJCFLAGS make variable
- 8260 i2c enhancement:
o correctly extends the timeout depending on the size of all
queued messages for both transmit and receive
o will not continue with receive if transmit times out
o ensures that the error callback is done for all queued tx
and rx messages
o correctly detects both tx and rx timeouts, only delivers one to
the callback, and does not overwrite an earlier error
o logic in i2c_probe now correct
- add "vprintf()" function so that "panic()" function can be
technically correct
- many Hymod board changes
diff --git a/include/cmd_bsp.h b/include/cmd_bsp.h
index 7966ad5..008008a 100644
--- a/include/cmd_bsp.h
+++ b/include/cmd_bsp.h
@@ -168,14 +168,20 @@
" address spaces appear in the physical address space\n" \
), MK_CMD_TBL_ENTRY( \
"eeclear", 4, 1, 0, do_eecl, \
- "eeclear - Clear the eeprom on a Hymod board \n", \
+ "eeclear - Clear the eeprom on a Hymod board\n", \
"[type]\n" \
" - write zeroes into the EEPROM on the board of type `type'\n"\
" (`type' is either `main' or `mezz' - default `main')\n" \
" Note: the EEPROM write enable jumper must be installed\n" \
+), MK_CMD_TBL_ENTRY( \
+ "htest", 5, 1, 0, do_htest, \
+ "htest - run HYMOD tests\n", \
+ NULL \
),
+
int do_fpga (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
int do_eecl (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
+int do_htest(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
#endif /* CONFIG_HYMOD */
/* -------------------------------------------------------------------- */
diff --git a/include/common.h b/include/common.h
index b0640c6..cc5dbe7 100644
--- a/include/common.h
+++ b/include/common.h
@@ -52,7 +52,7 @@
#include <ppc4xx.h>
#endif
#ifdef CONFIG_HYMOD
-#include <asm/hymod.h>
+#include <board/hymod/hymod.h>
#endif
#ifdef CONFIG_ARM
#define asmlinkage /* nothing */
@@ -131,6 +131,7 @@
void main_loop (void);
int run_command (const char *cmd, int flag);
int readline (const char *const prompt);
+void init_cmd_timeout(void);
void reset_cmd_timeout(void);
/* common/board.c */
@@ -195,6 +196,9 @@
/* $(BOARD)/eeprom.c */
void eeprom_init (void);
+#ifndef CONFIG_SPI
+int eeprom_probe (unsigned dev_addr, unsigned offset);
+#endif
int eeprom_read (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cnt);
int eeprom_write (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cnt);
#ifdef CONFIG_LWMON
@@ -437,6 +441,7 @@
void putc(const char c);
void puts(const char *s);
void printf(const char *fmt, ...);
+void vprintf(const char *fmt, va_list args);
/* stderr */
#define eputc(c) fputc(stderr, c)
diff --git a/include/configs/hymod.h b/include/configs/hymod.h
index e3a0ee3..dc7de44 100644
--- a/include/configs/hymod.h
+++ b/include/configs/hymod.h
@@ -73,6 +73,9 @@
#define CONFIG_ETHER_ON_FCC /* define if ether on FCC */
#undef CONFIG_ETHER_NONE /* define if ether on something else */
#define CONFIG_ETHER_INDEX 1 /* which channel for ether */
+#define CONFIG_ETHER_LOOPBACK_TEST /* add ether external loopback test */
+
+#ifdef CONFIG_ETHER_ON_FCC
#if (CONFIG_ETHER_INDEX == 1)
@@ -87,6 +90,10 @@
# define CFG_CPMFCR_RAMTYPE 0
# define CFG_FCC_PSMR (FCC_PSMR_FDE|FCC_PSMR_LPB)
+# define MDIO_PORT 0 /* Port A */
+# define MDIO_DATA_PINMASK 0x00040000 /* Pin 13 */
+# define MDIO_CLCK_PINMASK 0x00080000 /* Pin 12 */
+
#elif (CONFIG_ETHER_INDEX == 2)
/*
@@ -100,6 +107,10 @@
# define CFG_CPMFCR_RAMTYPE 0
# define CFG_FCC_PSMR (FCC_PSMR_FDE|FCC_PSMR_LPB)
+# define MDIO_PORT 0 /* Port A */
+# define MDIO_DATA_PINMASK 0x00000040 /* Pin 25 */
+# define MDIO_CLCK_PINMASK 0x00000080 /* Pin 24 */
+
#elif (CONFIG_ETHER_INDEX == 3)
/*
@@ -113,11 +124,33 @@
# define CFG_CPMFCR_RAMTYPE 0
# define CFG_FCC_PSMR (FCC_PSMR_FDE|FCC_PSMR_LPB)
+# define MDIO_PORT 0 /* Port A */
+# define MDIO_DATA_PINMASK 0x00000100 /* Pin 23 */
+# define MDIO_CLCK_PINMASK 0x00000200 /* Pin 22 */
+
#endif /* CONFIG_ETHER_INDEX */
+#define CONFIG_MII /* MII PHY management */
+#define CONFIG_BITBANGMII /* bit-bang MII PHY management */
+
+#define MDIO_ACTIVE (iop->pdir |= MDIO_DATA_PINMASK)
+#define MDIO_TRISTATE (iop->pdir &= ~MDIO_DATA_PINMASK)
+#define MDIO_READ ((iop->pdat & MDIO_DATA_PINMASK) != 0)
+
+#define MDIO(bit) if(bit) iop->pdat |= MDIO_DATA_PINMASK; \
+ else iop->pdat &= ~MDIO_DATA_PINMASK
+
+#define MDC(bit) if(bit) iop->pdat |= MDIO_CLCK_PINMASK; \
+ else iop->pdat &= ~MDIO_CLCK_PINMASK
+
+#define MIIDELAY udelay(1)
+
+#endif /* CONFIG_ETHER_ON_FCC */
+
/* other options */
#define CONFIG_HARD_I2C 1 /* To enable I2C hardware support */
+#define CONFIG_DTT_ADM1021 1 /* ADM1021 temp sensor support */
/* system clock rate (CLKIN) - equal to the 60x and local bus speed */
#ifdef DEBUG
@@ -129,39 +162,52 @@
#if defined(CONFIG_CONS_USE_EXTC)
#define CONFIG_BAUDRATE 115200
#else
-#define CONFIG_BAUDRATE 38400
+#define CONFIG_BAUDRATE 9600
#endif
/* default ip addresses - these will be overridden */
#define CONFIG_IPADDR 192.168.1.1 /* hymod "boot" address */
#define CONFIG_SERVERIP 192.168.1.254 /* hymod "server" address */
+#define CONFIG_LAST_STAGE_INIT
+
#define CONFIG_COMMANDS (CFG_CMD_ALL & ~( \
CFG_CMD_BEDBUG | \
CFG_CMD_BMP | \
CFG_CMD_DOC | \
- CFG_CMD_ELF | \
CFG_CMD_FDC | \
CFG_CMD_FDOS | \
+ CFG_CMD_FPGA | \
CFG_CMD_HWFLOW | \
CFG_CMD_IDE | \
CFG_CMD_JFFS2 | \
CFG_CMD_NAND | \
- CFG_CMD_MII | \
CFG_CMD_MMC | \
CFG_CMD_PCMCIA | \
CFG_CMD_PCI | \
CFG_CMD_USB | \
CFG_CMD_SCSI | \
CFG_CMD_SPI | \
- CFG_CMD_VFD | \
- CFG_CMD_DTT ) )
+ CFG_CMD_VFD ) )
/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
#include <cmd_confdefs.h>
#ifdef DEBUG
#define CONFIG_BOOTDELAY -1 /* autoboot disabled */
+#else
+#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
+#define CONFIG_BOOT_RETRY_TIME 30 /* retry autoboot after 30 secs */
+#define CONFIG_BOOT_RETRY_MIN 1 /* can go down to 1 second timeout */
+/* Be selective on what keys can delay or stop the autoboot process
+ * To stop use: " "
+ */
+#define CONFIG_AUTOBOOT_KEYED
+#define CONFIG_AUTOBOOT_PROMPT "Autobooting in %d seconds, " \
+ "press <SPACE> to stop\n"
+#define CONFIG_AUTOBOOT_STOP_STR " "
+#undef CONFIG_AUTOBOOT_DELAY_STR
+#define DEBUG_BOOTKEYS 0
#endif
#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
@@ -173,9 +219,9 @@
#define CONFIG_KGDB_EXTC_RATE 3686400 /* serial ext clk rate in Hz */
#define CONFIG_KGDB_EXTC_PINSEL 0 /* pin select 0=CLK3/CLK9,1=CLK5/CLK15*/
# if defined(CONFIG_KGDB_USE_EXTC)
-#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port at */
+#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port at */
# else
-#define CONFIG_KGDB_BAUDRATE 38400 /* speed to run kgdb serial port at */
+#define CONFIG_KGDB_BAUDRATE 9600 /* speed to run kgdb serial port at */
# endif
#endif
@@ -205,6 +251,8 @@
#define CFG_MEMTEST_START 0x00400000 /* memtest works on */
#define CFG_MEMTEST_END 0x03c00000 /* 4 ... 60 MB in DRAM */
+#define CFG_CLKS_IN_HZ 1 /* everything, incl board info, in Hz */
+
#define CFG_LOAD_ADDR 0x100000 /* default load address */
#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
@@ -217,9 +265,48 @@
/* these are for the ST M24C02 2kbit serial i2c eeprom */
#define CFG_I2C_EEPROM_ADDR 0x50 /* base address */
#define CFG_I2C_EEPROM_ADDR_LEN 1 /* bytes of address */
+/* mask of address bits that overflow into the "EEPROM chip address" */
+#define CFG_I2C_EEPROM_ADDR_OVERFLOW 0x07
+
+#define CFG_EEPROM_PAGE_WRITE_ENABLE 1 /* write eeprom in pages */
+#define CFG_EEPROM_PAGE_WRITE_BITS 4 /* 16 byte write page size */
+#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */
+
+#define CFG_I2C_MULTI_EEPROMS 1 /* hymod has two eeproms */
+
#define CFG_I2C_RTC_ADDR 0x51 /* philips PCF8563 RTC address */
/*
+ * standard dtt sensor configuration - bottom bit will determine local or
+ * remote sensor of the ADM1021, the rest determines index into
+ * CFG_DTT_ADM1021 array below.
+ *
+ * On HYMOD board, the remote sensor should be connected to the MPC8260
+ * temperature diode thingy, but an errata said this didn't work and
+ * should be disabled - so it isn't connected.
+ */
+#if 0
+#define CONFIG_DTT_SENSORS { 0, 1 }
+#else
+#define CONFIG_DTT_SENSORS { 0 }
+#endif
+
+/*
+ * ADM1021 temp sensor configuration (see dtt/adm1021.c for details).
+ * there will be one entry in this array for each two (dummy) sensors in
+ * CONFIG_DTT_SENSORS.
+ *
+ * For HYMOD board:
+ * - only one ADM1021
+ * - i2c addr 0x2a (both ADD0 and ADD1 are N/C)
+ * - conversion rate 0x02 = 0.25 conversions/second
+ * - ALERT ouput disabled
+ * - local temp sensor enabled, min set to 0 deg, max set to 85 deg
+ * - remote temp sensor disabled (see comment for CONFIG_DTT_SENSORS above)
+ */
+#define CFG_DTT_ADM1021 { { 0x2a, 0x02, 0, 1, 0, 85, 0, } }
+
+/*
* Low Level Configuration Settings
* (address mappings, register initial values, etc.)
* You should know what you are doing if you make changes here.
@@ -296,10 +383,6 @@
#define CFG_FLASH_ERASE_TOUT 120000 /* Flash Erase Timeout (in ms) */
#define CFG_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */
-#define CFG_FLASH_TYPE FLASH_28F640J3A
-#define CFG_FLASH_ID (INTEL_ID_28F640J3A & 0xff)
-#define CFG_FLASH_NBLOCKS 64
-
#define CFG_ENV_IS_IN_FLASH 1
#define CFG_ENV_SIZE 0x1000 /* Total Size of Environment Sector */
#define CFG_ENV_SECT_SIZE 0x40000 /* see README - env sect real size */
@@ -610,6 +693,11 @@
#define FPGA_MEZZ_ENABLE_PIN 3 /* PA3 */
/*
+ * FPGA Interrupt configuration
+ */
+#define FPGA_MAIN_IRQ SIU_INT_IRQ2
+
+/*
* Internal Definitions
*
* Boot Flags
diff --git a/include/dtt.h b/include/dtt.h
index f3d95ff..a17aa67 100644
--- a/include/dtt.h
+++ b/include/dtt.h
@@ -27,9 +27,13 @@
#ifndef _DTT_H_
#define _DTT_H_
-#if defined(CONFIG_DTT_LM75) || defined(CONFIG_DTT_DS1621)
+#if defined(CONFIG_DTT_LM75) || \
+ defined(CONFIG_DTT_DS1621) || \
+ defined(CONFIG_DTT_ADM1021)
+
#define CONFIG_DTT /* We have a DTT */
+#ifndef CONFIG_DTT_ADM1021
#define DTT_COMMERCIAL_MAX_TEMP 70 /* 0 - +70 C */
#define DTT_INDUSTRIAL_MAX_TEMP 85 /* -40 - +85 C */
#define DTT_AUTOMOTIVE_MAX_TEMP 105 /* -40 - +105 C */
@@ -39,6 +43,7 @@
#ifndef CFG_DTT_HYSTERESIS
#define CFG_DTT_HYSTERESIS 5 /* 5 C */
#endif
+#endif /* CONFIG_DTT_ADM1021 */
extern int dtt_init (void);
extern int dtt_read(int sensor, int reg);
@@ -64,4 +69,37 @@
#define DTT_CONFIG 0xAC
#endif
+#if defined(CONFIG_DTT_ADM1021)
+#define DTT_READ_LOC_VALUE 0x00
+#define DTT_READ_REM_VALUE 0x01
+#define DTT_READ_STATUS 0x02
+#define DTT_READ_CONFIG 0x03
+#define DTT_READ_CONVRATE 0x04
+#define DTT_READ_LOC_HIGHLIM 0x05
+#define DTT_READ_LOC_LOWLIM 0x06
+#define DTT_READ_REM_HIGHLIM 0x07
+#define DTT_READ_REM_LOWLIM 0x08
+#define DTT_READ_DEVID 0xfe
+
+#define DTT_WRITE_CONFIG 0x09
+#define DTT_WRITE_CONVRATE 0x0a
+#define DTT_WRITE_LOC_HIGHLIM 0x0b
+#define DTT_WRITE_LOC_LOWLIM 0x0c
+#define DTT_WRITE_REM_HIGHLIM 0x0d
+#define DTT_WRITE_REM_LOWLIM 0x0e
+#define DTT_WRITE_ONESHOT 0x0f
+
+#define DTT_STATUS_BUSY 0x80 /* 1=ADC Converting */
+#define DTT_STATUS_LHIGH 0x40 /* 1=Local High Temp Limit Tripped */
+#define DTT_STATUS_LLOW 0x20 /* 1=Local Low Temp Limit Tripped */
+#define DTT_STATUS_RHIGH 0x10 /* 1=Remote High Temp Limit Tripped */
+#define DTT_STATUS_RLOW 0x08 /* 1=Remote Low Temp Limit Tripped */
+#define DTT_STATUS_OPEN 0x04 /* 1=Remote Sensor Open-Circuit */
+
+#define DTT_CONFIG_ALERT_MASKED 0x80 /* 0=ALERT Enabled, 1=ALERT Masked */
+#define DTT_CONFIG_STANDBY 0x40 /* 0=Run, 1=Standby */
+
+#define DTT_ADM1021_DEVID 0x41
+#endif
+
#endif /* _DTT_H_ */
diff --git a/include/flash.h b/include/flash.h
index e594788..7223f59 100644
--- a/include/flash.h
+++ b/include/flash.h
@@ -204,10 +204,11 @@
#define INTEL_ID_28F640C3B 0x88CD88CD /* 64M = 4M x 16 bottom boot sector */
#define INTEL_ID_28F128J3 0x89189818 /* 16M = 8M x 16 x 128 */
-#define INTEL_ID_28F640J5 0x00150015 /* 64M = 128K x 64 */
-#define INTEL_ID_28F320J3A 0x00160016 /* 32M = 128K x 32 */
-#define INTEL_ID_28F640J3A 0x00170017 /* 64M = 128K x 64 */
-#define INTEL_ID_28F128J3A 0x00180018 /* 128M = 128K x 128 */
+#define INTEL_ID_28F320J5 0x00140014 /* 32M = 128K x 32 */
+#define INTEL_ID_28F640J5 0x00150015 /* 64M = 128K x 64 */
+#define INTEL_ID_28F320J3A 0x00160016 /* 32M = 128K x 32 */
+#define INTEL_ID_28F640J3A 0x00170017 /* 64M = 128K x 64 */
+#define INTEL_ID_28F128J3A 0x00180018 /* 128M = 128K x 128 */
#define INTEL_ID_28F160S3 0x00D000D0 /* 16M = 512K x 32 (64kB x 32) */
#define INTEL_ID_28F320S3 0x00D400D4 /* 32M = 512K x 64 (64kB x 64) */
diff --git a/include/mpc8260_irq.h b/include/mpc8260_irq.h
index 046dd32..9bee9a3 100644
--- a/include/mpc8260_irq.h
+++ b/include/mpc8260_irq.h
@@ -28,6 +28,13 @@
*/
#define SIU_INT_SMC1 ((uint)0x04)
#define SIU_INT_SMC2 ((uint)0x05)
+#define SIU_INT_IRQ1 ((uint)0x13)
+#define SIU_INT_IRQ2 ((uint)0x14)
+#define SIU_INT_IRQ3 ((uint)0x15)
+#define SIU_INT_IRQ4 ((uint)0x16)
+#define SIU_INT_IRQ5 ((uint)0x17)
+#define SIU_INT_IRQ6 ((uint)0x18)
+#define SIU_INT_IRQ7 ((uint)0x19)
#define SIU_INT_FCC1 ((uint)0x20)
#define SIU_INT_FCC2 ((uint)0x21)
#define SIU_INT_FCC3 ((uint)0x22)
