* Patches by Yuli Barcohen, 13 Jul 2003:
- Correct flash and JFFS2 support for MPC8260ADS
- fix PVR values and clock generation for PowerQUICC II family
(8270/8275/8280)
* Patch by Bernhard Kuhn, 08 Jul 2003:
- add support for M68K targets
* Patch by Ken Chou, 3 Jul:
- Fix PCI config table for A3000
- Fix iobase for natsemi.c
(PCI_BASE_ADDRESS_0 is the IO base register for DP83815)
* Allow to enable "slow" POST routines by key press on power-on
* Fix temperature dependend switching of LCD backlight on LWMON
* Tweak output format for LWMON
diff --git a/cpu/mpc8260/commproc.c b/cpu/mpc8260/commproc.c
index c523ee4..72cceb3 100644
--- a/cpu/mpc8260/commproc.c
+++ b/cpu/mpc8260/commproc.c
@@ -111,9 +111,9 @@
* to port numbers). Documentation uses 1-based numbering.
*/
#define BRG_INT_CLK gd->brg_clk
-#define BRG_UART_CLK ((BRG_INT_CLK + 15) / 16)
+#define BRG_UART_CLK (BRG_INT_CLK / 16)
-/* This function is used by UARTS, or anything else that uses a 16x
+/* This function is used by UARTs, or anything else that uses a 16x
* oversampled clock.
*/
void
@@ -123,9 +123,10 @@
volatile immap_t *immr = (immap_t *)CFG_IMMR;
volatile uint *bp;
+ uint cd = BRG_UART_CLK / rate;
- /* This is good enough to get SMCs running.....
- */
+ if ((BRG_UART_CLK % rate) < (rate / 2))
+ cd--;
if (brg < 4) {
bp = (uint *)&immr->im_brgc1;
}
@@ -134,7 +135,7 @@
brg -= 4;
}
bp += brg;
- *bp = (((((BRG_UART_CLK+rate-1)/rate)-1)&0xfff)<<1)|CPM_BRG_EN;
+ *bp = (cd << 1) | CPM_BRG_EN;
}
/* This function is used to set high speed synchronous baud rate
