Fix some typos This patch fixes three typos. The first is a repetition of CONFIG_CMD_BSP. The second makes the #endif comment match its #if. The third is a spelling error. Signed-off-by: Adrian Filipi <adrian.filipi@eurotech.com>
diff --git a/README b/README index 5e2bca4..f14fb7b 100644 --- a/README +++ b/README
@@ -623,7 +623,6 @@ CONFIG_CMD_SPI * SPI serial bus support CONFIG_CMD_USB * USB support CONFIG_CMD_VFD * VFD support (TRAB) - CONFIG_CMD_BSP * Board SPecific functions CONFIG_CMD_CDP * Cisco Discover Protocol support CONFIG_CMD_FSL * Microblaze FSL support
diff --git a/cpu/arm920t/s3c24x0/usb.c b/cpu/arm920t/s3c24x0/usb.c index ef5d5bf..421ebb4 100644 --- a/cpu/arm920t/s3c24x0/usb.c +++ b/cpu/arm920t/s3c24x0/usb.c
@@ -69,4 +69,4 @@ } # endif /* defined(CONFIG_S3C2400) || defined(CONFIG_S3C2410) */ -#endif /* defined(CONFIG_USB_OHCI) && defined(CFG_USB_OHCI_CPU_INIT) */ +#endif /* defined(CONFIG_USB_OHCI_NEW) && defined(CFG_USB_OHCI_CPU_INIT) */
diff --git a/doc/README.nand-boot-ppc440 b/doc/README.nand-boot-ppc440 index a1c1d8c..1e9c102 100644 --- a/doc/README.nand-boot-ppc440 +++ b/doc/README.nand-boot-ppc440
@@ -9,7 +9,7 @@ completely without NOR FLASH. This can be done by using the NAND boot feature of the 440 NAND flash controller (NDFC). -Here a short desciption of the different boot stages: +Here a short description of the different boot stages: a) IPL (Initial Program Loader, integrated inside CPU) ------------------------------------------------------