Make compile clean, fix the usual small problems.
diff --git a/include/configs/CPCI4052.h b/include/configs/CPCI4052.h
index 48f410e..843115c 100644
--- a/include/configs/CPCI4052.h
+++ b/include/configs/CPCI4052.h
@@ -303,7 +303,7 @@
#define CFG_EBC_PB3CR 0xF011A000 /* BAS=0xF01,BS=1MB,BU=R/W,BW=16bit */
/* Memory Bank 4 (NVRAM/RTC) initialization */
-//#define CFG_EBC_PB4AP 0x01805280 /* TWT=3,WBN=1,WBF=1,TH=1,SOR=1 */
+/*#define CFG_EBC_PB4AP 0x01805280 / * TWT=3,WBN=1,WBF=1,TH=1,SOR=1 */
#define CFG_EBC_PB4AP 0x01805680 /* TWT=3,WBN=1,WBF=1,TH=3,SOR=1 */
#define CFG_EBC_PB4CR 0xF0218000 /* BAS=0xF02,BS=1MB,BU=R/W,BW=8bit */
diff --git a/include/configs/LANTEC.h b/include/configs/LANTEC.h
index fe9ee22..f152dc7 100644
--- a/include/configs/LANTEC.h
+++ b/include/configs/LANTEC.h
@@ -98,6 +98,7 @@
& ~CFG_CMD_JFFS2 \
& ~CFG_CMD_KGDB \
& ~CFG_CMD_MII \
+ & ~CFG_CMD_NAND \
& ~CFG_CMD_PCI \
& ~CFG_CMD_PCMCIA \
& ~CFG_CMD_SCSI \
diff --git a/include/configs/MPC8260ADS.h b/include/configs/MPC8260ADS.h
index 7968c8b..838c7d3 100644
--- a/include/configs/MPC8260ADS.h
+++ b/include/configs/MPC8260ADS.h
@@ -126,6 +126,7 @@
CFG_CMD_IDE | \
CFG_CMD_JFFS2 | \
CFG_CMD_KGDB | \
+ CFG_CMD_NAND | \
CFG_CMD_MII | \
CFG_CMD_PCI | \
CFG_CMD_PCMCIA | \
diff --git a/include/configs/MPC8266ADS.h b/include/configs/MPC8266ADS.h
index e72ce0a..0005785 100644
--- a/include/configs/MPC8266ADS.h
+++ b/include/configs/MPC8266ADS.h
@@ -125,6 +125,7 @@
CFG_CMD_IDE | \
CFG_CMD_JFFS2 | \
CFG_CMD_KGDB | \
+ CFG_CMD_NAND | \
CFG_CMD_MII | \
CFG_CMD_PCI | \
CFG_CMD_PCMCIA | \
diff --git a/include/configs/PCI405.h b/include/configs/PCI405.h
index 39fdf55..02c511d 100644
--- a/include/configs/PCI405.h
+++ b/include/configs/PCI405.h
@@ -276,7 +276,7 @@
/* Memory Bank 2 (CAN0, 1) initialization */
#define CFG_EBC_PB2AP 0x010053C0 /* BWT=2,WBN=1,WBF=1,TH=1,RE=1,SOR=1,BEM=1 */
-//#define CFG_EBC_PB2AP 0x038056C0 /* BWT=2,WBN=1,WBF=1,TH=1,RE=1,SOR=1,BEM=1 */
+/*#define CFG_EBC_PB2AP 0x038056C0 / * BWT=2,WBN=1,WBF=1,TH=1,RE=1,SOR=1,BEM=1 */
#define CFG_EBC_PB2CR 0xF0018000 /* BAS=0xF00,BS=1MB,BU=R/W,BW=8bit */
/* Memory Bank 3 (FPGA internal) initialization */
diff --git a/include/configs/PM826.h b/include/configs/PM826.h
index 444b897..6e32a4b 100644
--- a/include/configs/PM826.h
+++ b/include/configs/PM826.h
@@ -198,7 +198,7 @@
#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
-#define CFG_RESET_ADDRESS 0xFFFFFFFC /* "bad" address */
+#define CFG_RESET_ADDRESS 0xFDFFFFFC /* "bad" address */
/*
* For booting Linux, the board info and command line data
diff --git a/include/configs/ep8260.h b/include/configs/ep8260.h
index 1285326..5c53a46 100644
--- a/include/configs/ep8260.h
+++ b/include/configs/ep8260.h
@@ -282,6 +282,7 @@
~CFG_CMD_JFFS2 & \
~CFG_CMD_KGDB & \
~CFG_CMD_MII & \
+ ~CFG_CMD_NAND & \
~CFG_CMD_PCI & \
~CFG_CMD_PCMCIA & \
~CFG_CMD_SCSI & \
diff --git a/include/configs/hymod.h b/include/configs/hymod.h
index 5d2bed6..271aacf 100644
--- a/include/configs/hymod.h
+++ b/include/configs/hymod.h
@@ -145,6 +145,7 @@
CFG_CMD_HWFLOW | \
CFG_CMD_IDE | \
CFG_CMD_JFFS2 | \
+ CFG_CMD_NAND | \
CFG_CMD_MII | \
CFG_CMD_PCMCIA | \
CFG_CMD_PCI | \
