Re-factoring the legacy NAND code (legacy NAND now only in board-specific
code and in SoC code). Boards using the old way have CFG_NAND_LEGACY and
BOARDLIBS = drivers/nand_legacy/libnand_legacy.a added. Build breakage for
NETTA.ERR and NETTA_ISDN - will go away when the new NAND support is
implemented for these boards.
diff --git a/common/cmd_jffs2.c b/common/cmd_jffs2.c
index ecadb79..201c3c1 100644
--- a/common/cmd_jffs2.c
+++ b/common/cmd_jffs2.c
@@ -91,7 +91,6 @@
 #include <command.h>
 #include <malloc.h>
 #include <jffs2/jffs2.h>
-#include <linux/mtd/nand.h>
 #include <linux/list.h>
 #include <linux/ctype.h>
 
@@ -99,10 +98,14 @@
 
 #include <cramfs/cramfs_fs.h>
 
-#ifdef CONFIG_NEW_NAND_CODE
+#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+#ifdef CFG_NAND_LEGACY
+#include <linux/mtd/nand_legacy.h>
+#else /* !CFG_NAND_LEGACY */
+#include <linux/mtd/nand.h>
 #include <nand.h>
-#endif
-
+#endif /* !CFG_NAND_LEGACY */
+#endif /* (CONFIG_COMMANDS & CFG_CMD_NAND) */
 /* enable/disable debugging messages */
 #define	DEBUG_JFFS
 #undef	DEBUG_JFFS
@@ -467,7 +470,7 @@
 		}
 	}
 
-#ifndef CONFIG_NEW_NAND_CODE
+#ifdef CFG_NAND_LEGACY
 	jffs2_free_cache(part);
 #endif
 	list_del(&part->link);
@@ -496,7 +499,7 @@
 	list_for_each_safe(entry, n, head) {
 		part_tmp = list_entry(entry, struct part_info, link);
 
-#ifndef CONFIG_NEW_NAND_CODE
+#ifdef CFG_NAND_LEGACY
 		jffs2_free_cache(part_tmp);
 #endif
 		list_del(entry);
@@ -732,7 +735,7 @@
 	} else if (type == MTD_DEV_TYPE_NAND) {
 #if defined(CONFIG_JFFS2_NAND) && (CONFIG_COMMANDS & CFG_CMD_NAND)
 		if (num < CFG_MAX_NAND_DEVICE) {
-#ifdef CONFIG_NEW_NAND_CODE
+#ifndef CFG_NAND_LEGACY
 			*size = nand_info[num].size;
 #else
 			extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE];