| #ifndef __DMC_H__ |
| #define __DMC_H__ |
| |
| #ifndef __ASSEMBLY__ |
| struct exynos5_dmc { |
| unsigned int concontrol; |
| unsigned int memcontrol; |
| unsigned int memconfig0; |
| unsigned int memconfig1; |
| unsigned int directcmd; |
| unsigned int prechconfig; |
| unsigned int phycontrol0; |
| unsigned char res1[0xc]; |
| unsigned int pwrdnconfig; |
| unsigned int timingpzq; |
| unsigned int timingref; |
| unsigned int timingrow; |
| unsigned int timingdata; |
| unsigned int timingpower; |
| unsigned int phystatus; |
| unsigned char res2[0x4]; |
| unsigned int chipstatus_ch0; |
| unsigned int chipstatus_ch1; |
| unsigned char res3[0x4]; |
| unsigned int mrstatus; |
| unsigned char res4[0x8]; |
| unsigned int qoscontrol0; |
| unsigned char resr5[0x4]; |
| unsigned int qoscontrol1; |
| unsigned char res6[0x4]; |
| unsigned int qoscontrol2; |
| unsigned char res7[0x4]; |
| unsigned int qoscontrol3; |
| unsigned char res8[0x4]; |
| unsigned int qoscontrol4; |
| unsigned char res9[0x4]; |
| unsigned int qoscontrol5; |
| unsigned char res10[0x4]; |
| unsigned int qoscontrol6; |
| unsigned char res11[0x4]; |
| unsigned int qoscontrol7; |
| unsigned char res12[0x4]; |
| unsigned int qoscontrol8; |
| unsigned char res13[0x4]; |
| unsigned int qoscontrol9; |
| unsigned char res14[0x4]; |
| unsigned int qoscontrol10; |
| unsigned char res15[0x4]; |
| unsigned int qoscontrol11; |
| unsigned char res16[0x4]; |
| unsigned int qoscontrol12; |
| unsigned char res17[0x4]; |
| unsigned int qoscontrol13; |
| unsigned char res18[0x4]; |
| unsigned int qoscontrol14; |
| unsigned char res19[0x4]; |
| unsigned int qoscontrol15; |
| unsigned char res20[0x14]; |
| unsigned int ivcontrol; |
| unsigned int wrtra_config; |
| unsigned int rdlvl_config; |
| unsigned char res21[0x8]; |
| unsigned int brbrsvconfig; |
| unsigned int brbqosconfig; |
| unsigned int membaseconfig0; |
| unsigned int membaseconfig1; |
| unsigned char res22[0xc]; |
| unsigned int wrlvl_config; |
| unsigned char res23[0xc]; |
| unsigned int perevcontrol; |
| unsigned int perev0config; |
| unsigned int perev1config; |
| unsigned int perev2config; |
| unsigned int perev3config; |
| unsigned char res24[0xdebc]; |
| unsigned int pmnc_ppc_a; |
| unsigned char res25[0xc]; |
| unsigned int cntens_ppc_a; |
| unsigned char res26[0xc]; |
| unsigned int cntenc_ppc_a; |
| unsigned char res27[0xc]; |
| unsigned int intens_ppc_a; |
| unsigned char res28[0xc]; |
| unsigned int intenc_ppc_a; |
| unsigned char res29[0xc]; |
| unsigned int flag_ppc_a; |
| unsigned char res30[0xac]; |
| unsigned int ccnt_ppc_a; |
| unsigned char res31[0xc]; |
| unsigned int pmcnt0_ppc_a; |
| unsigned char res32[0xc]; |
| unsigned int pmcnt1_ppc_a; |
| unsigned char res33[0xc]; |
| unsigned int pmcnt2_ppc_a; |
| unsigned char res34[0xc]; |
| unsigned int pmcnt3_ppc_a; |
| }; |
| |
| struct exynos5_phy_control { |
| unsigned int phy_con0; |
| unsigned int phy_con1; |
| unsigned int phy_con2; |
| unsigned int phy_con3; |
| unsigned int phy_con4; |
| unsigned char res1[4]; |
| unsigned int phy_con6; |
| unsigned char res2[4]; |
| unsigned int phy_con8; |
| unsigned int phy_con9; |
| unsigned int phy_con10; |
| unsigned char res3[4]; |
| unsigned int phy_con12; |
| unsigned int phy_con13; |
| unsigned int phy_con14; |
| unsigned int phy_con15; |
| unsigned int phy_con16; |
| unsigned char res4[4]; |
| unsigned int phy_con17; |
| unsigned int phy_con18; |
| unsigned int phy_con19; |
| unsigned int phy_con20; |
| unsigned int phy_con21; |
| unsigned int phy_con22; |
| unsigned int phy_con23; |
| unsigned int phy_con24; |
| unsigned int phy_con25; |
| unsigned int phy_con26; |
| unsigned int phy_con27; |
| unsigned int phy_con28; |
| unsigned int phy_con29; |
| unsigned int phy_con30; |
| unsigned int phy_con31; |
| unsigned int phy_con32; |
| unsigned int phy_con33; |
| unsigned int phy_con34; |
| unsigned int phy_con35; |
| unsigned int phy_con36; |
| unsigned int phy_con37; |
| unsigned int phy_con38; |
| unsigned int phy_con39; |
| unsigned int phy_con40; |
| unsigned int phy_con41; |
| unsigned int phy_con42; |
| }; |
| #endif |
| #endif |
