| /* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */ |
| /* |
| * Copyright (C) STMicroelectronics 2018 - All Rights Reserved |
| */ |
| |
| #include <dt-bindings/interrupt-controller/arm-gic.h> |
| #include <dt-bindings/clock/stm32mp1-clks.h> |
| #include <dt-bindings/reset-controller/stm32mp1-resets.h> |
| |
| / { |
| #address-cells = <1>; |
| #size-cells = <1>; |
| |
| cpus { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| cpu0: cpu@0 { |
| compatible = "arm,cortex-a7"; |
| device_type = "cpu"; |
| reg = <0>; |
| }; |
| |
| cpu1: cpu@1 { |
| compatible = "arm,cortex-a7"; |
| device_type = "cpu"; |
| reg = <1>; |
| }; |
| }; |
| |
| aliases { |
| serial3 = &uart4; |
| }; |
| |
| intc: interrupt-controller@a0021000 { |
| compatible = "arm,cortex-a7-gic"; |
| #interrupt-cells = <3>; |
| interrupt-controller; |
| reg = <0xa0021000 0x1000>, |
| <0xa0022000 0x2000>; |
| }; |
| |
| clocks { |
| clk_hse: clk-hse { |
| #clock-cells = <0>; |
| compatible = "fixed-clock"; |
| clock-frequency = <24000000>; |
| }; |
| |
| clk_hsi: clk-hsi { |
| #clock-cells = <0>; |
| compatible = "fixed-clock"; |
| clock-frequency = <64000000>; |
| }; |
| |
| clk_lse: clk-lse { |
| #clock-cells = <0>; |
| compatible = "fixed-clock"; |
| clock-frequency = <32768>; |
| }; |
| |
| clk_lsi: clk-lsi { |
| #clock-cells = <0>; |
| compatible = "fixed-clock"; |
| clock-frequency = <32000>; |
| }; |
| |
| clk_csi: clk-csi { |
| #clock-cells = <0>; |
| compatible = "fixed-clock"; |
| clock-frequency = <4000000>; |
| }; |
| }; |
| |
| soc { |
| compatible = "simple-bus"; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| interrupt-parent = <&intc>; |
| ranges; |
| |
| uart4: serial@40010000 { |
| compatible = "st,stm32h7-uart"; |
| reg = <0x40010000 0x400>; |
| clocks = <&rcc_clk UART4_K>; |
| status = "disabled"; |
| }; |
| |
| sdmmc3: sdmmc@48004000 { |
| compatible = "st,stm32-sdmmc2"; |
| reg = <0x48004000 0x400>, <0x48005000 0x400>; |
| reg-names = "sdmmc", "delay"; |
| interrupts = <GIC_SPI 137 IRQ_TYPE_NONE>; |
| clocks = <&rcc_clk SDMMC3_K>; |
| resets = <&rcc_rst SDMMC3_R>; |
| st,idma = <1>; |
| cap-sd-highspeed; |
| cap-mmc-highspeed; |
| max-frequency = <120000000>; |
| status = "disabled"; |
| }; |
| |
| rcc: rcc@50000000 { |
| compatible = "syscon", "simple-mfd"; |
| |
| reg = <0x50000000 0x1000>; |
| |
| rcc_clk: rcc-clk@50000000 { |
| #clock-cells = <1>; |
| compatible = "st,stm32mp1-rcc-clk"; |
| }; |
| |
| rcc_rst: rcc-reset@50000000 { |
| #reset-cells = <1>; |
| compatible = "st,stm32mp1-rcc-rst"; |
| }; |
| |
| rcc_reboot: rcc-reboot@50000000 { |
| compatible = "syscon-reboot"; |
| regmap = <&rcc>; |
| offset = <0x404>; |
| mask = <0x1>; |
| }; |
| }; |
| |
| pinctrl: pin-controller { |
| compatible = "st,stm32mp157-pinctrl"; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| ranges = <0 0x50002000 0xa400>; |
| pins-are-numbered; |
| |
| gpioa: gpio@50002000 { |
| gpio-controller; |
| #gpio-cells = <2>; |
| interrupt-controller; |
| #interrupt-cells = <2>; |
| reg = <0x0 0x400>; |
| clocks = <&rcc_clk GPIOA>; |
| st,bank-name = "GPIOA"; |
| ngpios = <16>; |
| gpio-ranges = <&pinctrl 0 0 16>; |
| status = "disabled"; |
| }; |
| |
| gpiob: gpio@50003000 { |
| gpio-controller; |
| #gpio-cells = <2>; |
| interrupt-controller; |
| #interrupt-cells = <2>; |
| reg = <0x1000 0x400>; |
| clocks = <&rcc_clk GPIOB>; |
| st,bank-name = "GPIOB"; |
| ngpios = <16>; |
| gpio-ranges = <&pinctrl 0 16 16>; |
| status = "disabled"; |
| }; |
| |
| gpioc: gpio@50004000 { |
| gpio-controller; |
| #gpio-cells = <2>; |
| interrupt-controller; |
| #interrupt-cells = <2>; |
| reg = <0x2000 0x400>; |
| clocks = <&rcc_clk GPIOC>; |
| st,bank-name = "GPIOC"; |
| ngpios = <16>; |
| gpio-ranges = <&pinctrl 0 32 16>; |
| status = "disabled"; |
| }; |
| |
| gpiod: gpio@50005000 { |
| gpio-controller; |
| #gpio-cells = <2>; |
| interrupt-controller; |
| #interrupt-cells = <2>; |
| reg = <0x3000 0x400>; |
| clocks = <&rcc_clk GPIOD>; |
| st,bank-name = "GPIOD"; |
| ngpios = <16>; |
| gpio-ranges = <&pinctrl 0 48 16>; |
| status = "disabled"; |
| }; |
| |
| gpioe: gpio@50006000 { |
| gpio-controller; |
| #gpio-cells = <2>; |
| interrupt-controller; |
| #interrupt-cells = <2>; |
| reg = <0x4000 0x400>; |
| clocks = <&rcc_clk GPIOE>; |
| st,bank-name = "GPIOE"; |
| ngpios = <16>; |
| gpio-ranges = <&pinctrl 0 64 16>; |
| status = "disabled"; |
| }; |
| |
| gpiof: gpio@50007000 { |
| gpio-controller; |
| #gpio-cells = <2>; |
| interrupt-controller; |
| #interrupt-cells = <2>; |
| reg = <0x5000 0x400>; |
| clocks = <&rcc_clk GPIOF>; |
| st,bank-name = "GPIOF"; |
| ngpios = <16>; |
| gpio-ranges = <&pinctrl 0 80 16>; |
| status = "disabled"; |
| }; |
| |
| gpiog: gpio@50008000 { |
| gpio-controller; |
| #gpio-cells = <2>; |
| interrupt-controller; |
| #interrupt-cells = <2>; |
| reg = <0x6000 0x400>; |
| clocks = <&rcc_clk GPIOG>; |
| st,bank-name = "GPIOG"; |
| ngpios = <16>; |
| gpio-ranges = <&pinctrl 0 96 16>; |
| status = "disabled"; |
| }; |
| |
| gpioh: gpio@50009000 { |
| gpio-controller; |
| #gpio-cells = <2>; |
| interrupt-controller; |
| #interrupt-cells = <2>; |
| reg = <0x7000 0x400>; |
| clocks = <&rcc_clk GPIOH>; |
| st,bank-name = "GPIOH"; |
| ngpios = <16>; |
| gpio-ranges = <&pinctrl 0 112 16>; |
| status = "disabled"; |
| }; |
| |
| gpioi: gpio@5000a000 { |
| gpio-controller; |
| #gpio-cells = <2>; |
| interrupt-controller; |
| #interrupt-cells = <2>; |
| reg = <0x8000 0x400>; |
| clocks = <&rcc_clk GPIOI>; |
| st,bank-name = "GPIOI"; |
| ngpios = <16>; |
| gpio-ranges = <&pinctrl 0 128 16>; |
| status = "disabled"; |
| }; |
| |
| gpioj: gpio@5000b000 { |
| gpio-controller; |
| #gpio-cells = <2>; |
| interrupt-controller; |
| #interrupt-cells = <2>; |
| reg = <0x9000 0x400>; |
| clocks = <&rcc_clk GPIOJ>; |
| st,bank-name = "GPIOJ"; |
| ngpios = <16>; |
| gpio-ranges = <&pinctrl 0 144 16>; |
| status = "disabled"; |
| }; |
| |
| gpiok: gpio@5000c000 { |
| gpio-controller; |
| #gpio-cells = <2>; |
| interrupt-controller; |
| #interrupt-cells = <2>; |
| reg = <0xa000 0x400>; |
| clocks = <&rcc_clk GPIOK>; |
| st,bank-name = "GPIOK"; |
| ngpios = <8>; |
| gpio-ranges = <&pinctrl 0 160 8>; |
| status = "disabled"; |
| }; |
| }; |
| |
| pinctrl_z: pin-controller-z { |
| compatible = "st,stm32mp157-z-pinctrl"; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| ranges = <0 0x54004000 0x400>; |
| pins-are-numbered; |
| |
| gpioz: gpio@54004000 { |
| gpio-controller; |
| #gpio-cells = <2>; |
| interrupt-controller; |
| #interrupt-cells = <2>; |
| reg = <0 0x400>; |
| clocks = <&rcc_clk GPIOZ>; |
| st,bank-name = "GPIOZ"; |
| st,bank-ioport = <11>; |
| ngpios = <8>; |
| gpio-ranges = <&pinctrl_z 0 400 8>; |
| status = "disabled"; |
| }; |
| }; |
| |
| sdmmc1: sdmmc@58005000 { |
| compatible = "st,stm32-sdmmc2"; |
| reg = <0x58005000 0x1000>, <0x58006000 0x1000>; |
| reg-names = "sdmmc", "delay"; |
| clocks = <&rcc_clk SDMMC1_K>; |
| resets = <&rcc_rst SDMMC1_R>; |
| st,idma = <1>; |
| cap-sd-highspeed; |
| cap-mmc-highspeed; |
| max-frequency = <120000000>; |
| status = "disabled"; |
| }; |
| |
| sdmmc2: sdmmc@58007000 { |
| compatible = "st,stm32-sdmmc2"; |
| reg = <0x58007000 0x1000>, <0x58008000 0x1000>; |
| reg-names = "sdmmc", "delay"; |
| interrupts = <GIC_SPI 124 IRQ_TYPE_NONE>; |
| clocks = <&rcc_clk SDMMC2_K>; |
| resets = <&rcc_rst SDMMC2_R>; |
| st,idma = <1>; |
| cap-sd-highspeed; |
| cap-mmc-highspeed; |
| max-frequency = <120000000>; |
| status = "disabled"; |
| }; |
| |
| i2c4: i2c@5c002000 { |
| compatible = "st,stm32f7-i2c"; |
| reg = <0x5c002000 0x400>; |
| interrupt-names = "event", "error", "wakeup"; |
| clocks = <&rcc_clk I2C4_K>; |
| resets = <&rcc_rst I2C4_R>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| wakeup-source; |
| status = "disabled"; |
| }; |
| }; |
| }; |
