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Soft SPI
The soft SPI bus implementation allows the use of GPIO pins to simulate a
SPI bus. No SPI host is required for this to work. The down-side is that the
performance will typically be much lower than a real SPI bus.
The soft SPI node requires the following properties:
compatible: "u-boot,soft-spi"
soft_spi_cs: GPIO number to use for SPI chip select (output)
soft_spi_sclk: GPIO number to use for SPI clock (output)
soft_spi_mosi: GPIO number to use for SPI MOSI line (output)
soft_spi_miso GPIO number to use for SPI MISO line (input)
spi-delay-us: Number of microseconds of delay between each CS transition
The GPIOs should be specified as required by the GPIO controller referenced.
The first cell holds the phandle of the controller and the second cell
typically holds the GPIO number.
soft-spi {
compatible = "u-boot,soft-spi";
cs-gpio = <&gpio 235 0>; /* Y43 */
sclk-gpio = <&gpio 225 0>; /* Y31 */
mosi-gpio = <&gpio 227 0>; /* Y33 */
miso-gpio = <&gpio 224 0>; /* Y30 */
spi-delay-us = <1>;
#address-cells = <1>;
#size-cells = <0>;
cs@0 {