| /* |
| * Copyright (c) 2016 Andreas Färber |
| * |
| * Copyright (c) 2016 BayLibre, SAS. |
| * Author: Neil Armstrong <narmstrong@baylibre.com> |
| * |
| * Copyright (c) 2016 Endless Computers, Inc. |
| * Author: Carlo Caione <carlo@endlessm.com> |
| * |
| * This file is dual-licensed: you can use it either under the terms |
| * of the GPL or the X11 license, at your option. Note that this dual |
| * licensing only applies to this file, and not this project as a |
| * whole. |
| * |
| * a) This library is free software; you can redistribute it and/or |
| * modify it under the terms of the GNU General Public License as |
| * published by the Free Software Foundation; either version 2 of the |
| * License, or (at your option) any later version. |
| * |
| * This library is distributed in the hope that it will be useful, |
| * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| * GNU General Public License for more details. |
| * |
| * Or, alternatively, |
| * |
| * b) Permission is hereby granted, free of charge, to any person |
| * obtaining a copy of this software and associated documentation |
| * files (the "Software"), to deal in the Software without |
| * restriction, including without limitation the rights to use, |
| * copy, modify, merge, publish, distribute, sublicense, and/or |
| * sell copies of the Software, and to permit persons to whom the |
| * Software is furnished to do so, subject to the following |
| * conditions: |
| * |
| * The above copyright notice and this permission notice shall be |
| * included in all copies or substantial portions of the Software. |
| * |
| * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
| * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES |
| * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
| * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT |
| * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, |
| * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
| * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
| * OTHER DEALINGS IN THE SOFTWARE. |
| */ |
| |
| #include <dt-bindings/gpio/gpio.h> |
| #include <dt-bindings/interrupt-controller/irq.h> |
| #include <dt-bindings/interrupt-controller/arm-gic.h> |
| #include <dt-bindings/pwm/pwm.h> |
| #include <dt-bindings/pwm/meson.h> |
| #include <dt-bindings/clock/g12-clkc.h> |
| |
| / { |
| interrupt-parent = <&gic>; |
| #address-cells = <2>; |
| #size-cells = <2>; |
| |
| reserved-memory { |
| #address-cells = <2>; |
| #size-cells = <2>; |
| ranges; |
| |
| /* 16 MiB reserved for Hardware ROM Firmware */ |
| hwrom_reserved: hwrom@0 { |
| reg = <0x0 0x0 0x0 0x1000000>; |
| no-map; |
| }; |
| |
| /* 2 MiB reserved for ARM Trusted Firmware (BL31) */ |
| secmon_reserved: secmon@10000000 { |
| reg = <0x0 0x10000000 0x0 0x200000>; |
| no-map; |
| }; |
| |
| linux,cma { |
| compatible = "shared-dma-pool"; |
| reusable; |
| size = <0x0 0xbc00000>; |
| alignment = <0x0 0x400000>; |
| linux,cma-default; |
| }; |
| }; |
| |
| cpus { |
| #address-cells = <0x2>; |
| #size-cells = <0x0>; |
| |
| cpu0: cpu@0 { |
| device_type = "cpu"; |
| compatible = "arm,cortex-a53", "arm,armv8"; |
| reg = <0x0 0x0>; |
| enable-method = "psci"; |
| next-level-cache = <&l2>; |
| clocks = <&scpi_dvfs 0>; |
| }; |
| |
| cpu1: cpu@1 { |
| device_type = "cpu"; |
| compatible = "arm,cortex-a53", "arm,armv8"; |
| reg = <0x0 0x1>; |
| enable-method = "psci"; |
| next-level-cache = <&l2>; |
| clocks = <&scpi_dvfs 0>; |
| }; |
| |
| cpu2: cpu@2 { |
| device_type = "cpu"; |
| compatible = "arm,cortex-a53", "arm,armv8"; |
| reg = <0x0 0x2>; |
| enable-method = "psci"; |
| next-level-cache = <&l2>; |
| clocks = <&scpi_dvfs 0>; |
| }; |
| |
| cpu3: cpu@3 { |
| device_type = "cpu"; |
| compatible = "arm,cortex-a53", "arm,armv8"; |
| reg = <0x0 0x3>; |
| enable-method = "psci"; |
| next-level-cache = <&l2>; |
| clocks = <&scpi_dvfs 0>; |
| }; |
| |
| l2: l2-cache0 { |
| compatible = "cache"; |
| }; |
| }; |
| |
| arm-pmu { |
| compatible = "arm,cortex-a53-pmu"; |
| interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, |
| <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>, |
| <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>, |
| <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; |
| interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; |
| }; |
| |
| psci { |
| compatible = "arm,psci-0.2"; |
| method = "smc"; |
| }; |
| |
| timer { |
| compatible = "arm,armv8-timer"; |
| interrupts = <GIC_PPI 13 |
| (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>, |
| <GIC_PPI 14 |
| (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>, |
| <GIC_PPI 11 |
| (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>, |
| <GIC_PPI 10 |
| (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>; |
| }; |
| |
| xtal: xtal-clk { |
| compatible = "fixed-clock"; |
| clock-frequency = <24000000>; |
| clock-output-names = "xtal"; |
| #clock-cells = <0>; |
| }; |
| |
| firmware { |
| sm: secure-monitor { |
| compatible = "amlogic,meson-gx-sm", "amlogic,meson-gxbb-sm"; |
| }; |
| |
| optee { |
| compatible = "linaro,optee-tz"; |
| method = "smc"; |
| }; |
| }; |
| |
| efuse: efuse { |
| compatible = "amlogic,meson-gx-efuse", "amlogic,meson-gxbb-efuse"; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| |
| sn: sn@14 { |
| reg = <0x14 0x10>; |
| }; |
| |
| eth_mac: eth_mac@34 { |
| reg = <0x34 0x10>; |
| }; |
| |
| bid: bid@46 { |
| reg = <0x46 0x30>; |
| }; |
| }; |
| |
| scpi { |
| compatible = "amlogic,meson-gxbb-scpi", "arm,scpi-pre-1.0"; |
| mboxes = <&mailbox 1 &mailbox 2>; |
| shmem = <&cpu_scp_lpri &cpu_scp_hpri>; |
| |
| scpi_clocks: clocks { |
| compatible = "arm,scpi-clocks"; |
| |
| scpi_dvfs: scpi_clocks@0 { |
| compatible = "arm,scpi-dvfs-clocks"; |
| #clock-cells = <1>; |
| clock-indices = <0>; |
| clock-output-names = "vcpu"; |
| }; |
| }; |
| |
| scpi_sensors: sensors { |
| compatible = "amlogic,meson-gxbb-scpi-sensors", "arm,scpi-sensors"; |
| #thermal-sensor-cells = <1>; |
| }; |
| }; |
| |
| soc { |
| compatible = "simple-bus"; |
| #address-cells = <2>; |
| #size-cells = <2>; |
| ranges; |
| |
| cbus: cbus@ffd00000 { |
| compatible = "simple-bus"; |
| reg = <0x0 0xffd00000 0x0 0x26000>; |
| #address-cells = <2>; |
| #size-cells = <2>; |
| ranges = <0x0 0x0 0x0 0xffd00000 0x0 0x26000>; |
| |
| reset: reset-controller@1000 { |
| compatible = "amlogic,meson-gx-reset", "amlogic,meson-gxbb-reset"; |
| reg = <0x0 0x01000 0x0 0x1000>; |
| #reset-cells = <1>; |
| }; |
| |
| uart_A: serial@24000 { |
| compatible = "amlogic,meson-uart"; |
| reg = <0x0 0x24000 0x0 0x18>; |
| interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>; |
| clocks = <&xtal>; |
| status = "disabled"; |
| }; |
| |
| uart_B: serial@23000 { |
| compatible = "amlogic,meson-uart"; |
| reg = <0x0 0x23000 0x0 0x18>; |
| interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>; |
| clocks = <&xtal>; |
| status = "disabled"; |
| }; |
| |
| pwm_ab: pwm@1b000 { |
| compatible = "amlogic,g12a-ee-pwm"; |
| reg = <0x0 0x1b000 0x0 0x20>; |
| #pwm-cells = <3>; |
| status = "disabled"; |
| }; |
| |
| pwm_cd: pwm@1a000 { |
| compatible = "amlogic,g12a-ee-pwm"; |
| reg = <0x0 0x1a000 0x0 0x20>; |
| #pwm-cells = <3>; |
| status = "disabled"; |
| }; |
| |
| pwm_ef: pwm@19000 { |
| compatible = "amlogic,g12a-ee-pwm"; |
| reg = <0x0 0x19000 0x0 0x20>; |
| #pwm-cells = <3>; |
| status = "disabled"; |
| }; |
| |
| uart_C: serial@22000 { |
| compatible = "amlogic,meson-uart"; |
| reg = <0x0 0x22000 0x0 0x18>; |
| interrupts = <GIC_SPI 93 IRQ_TYPE_EDGE_RISING>; |
| clocks = <&xtal>; |
| status = "disabled"; |
| }; |
| |
| i2c0: i2c@1f000 { |
| compatible = "amlogic,meson-i2c"; |
| reg = <0x0 0x1f000 0x0 0x20>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| clocks = <&clkc CLKID_I2C>; |
| clock-names = "clk_i2c"; |
| status = "disabled"; |
| }; |
| |
| i2c1: i2c@1e000 { |
| compatible = "amlogic,meson-i2c"; |
| reg = <0x0 0x1e000 0x0 0x20>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| clocks = <&clkc CLKID_I2C>; |
| clock-names = "clk_i2c"; |
| status = "disabled"; |
| }; |
| |
| i2c2: i2c@1d000 { |
| compatible = "amlogic,meson-i2c"; |
| reg = <0x0 0x1d000 0x0 0x20>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| clocks = <&clkc CLKID_I2C>; |
| clock-names = "clk_i2c"; |
| status = "disabled"; |
| }; |
| |
| i2c3: i2c@1c000 { |
| compatible = "amlogic,meson-i2c"; |
| reg = <0x0 0x1c000 0x0 0x20>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| clocks = <&clkc CLKID_I2C>; |
| clock-names = "clk_i2c"; |
| status = "disabled"; |
| }; |
| |
| spicc0: spi@13000 { |
| compatible = "amlogic,meson-g12a-spicc"; |
| reg = <0x0 0x13000 0x0 0x44>; |
| interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| status = "disabled"; |
| }; |
| |
| spifc: spi@14000 { |
| compatible = "amlogic,spifc"; |
| reg = <0x0 0x14000 0x0 0x80>; |
| #ahb = <0x0 0xf6000000 0x0 0x4000000>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| status = "disabled"; |
| spi-flash@0 { |
| compatible = "spi-flash"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| status = "disabled"; |
| }; |
| spi-nand@1 { |
| compatible = "spi-nand"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| status = "okay"; |
| }; |
| }; |
| |
| spicc1: spi@15000 { |
| compatible = "amlogic,meson-g12a-spicc"; |
| reg = <0x0 0x15000 0x0 0x44>; |
| interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| status = "disabled"; |
| }; |
| |
| watchdog@0f0d0 { |
| compatible = "amlogic,meson-gxbb-wdt"; |
| reg = <0x0 0x0f0d0 0x0 0x10>; |
| clocks = <&xtal>; |
| clock-names = "wdt-clk"; |
| }; |
| }; |
| |
| gic: interrupt-controller@2c001000 { |
| compatible = "arm,gic-400"; |
| reg = <0x0 0xffc01000 0 0x1000>, |
| <0x0 0xffc02000 0 0x2000>, |
| <0x0 0xffc04000 0 0x2000>, |
| <0x0 0xffc06000 0 0x2000>; |
| interrupt-controller; |
| interrupts = <GIC_PPI 9 |
| (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>; |
| #interrupt-cells = <3>; |
| #address-cells = <0>; |
| }; |
| |
| sram: sram@fffa0000 { |
| compatible = "amlogic,meson-gx-sram", "amlogic,meson-gxbb-sram", "mmio-sram"; |
| reg = <0x0 0xfffa0000 0x0 0x48000>; |
| |
| #address-cells = <1>; |
| #size-cells = <1>; |
| ranges = <0 0x0 0xfffa0000 0x48000>; |
| |
| cpu_scp_lpri: scp-shmem@0 { |
| compatible = "amlogic,meson-gx-scp-shmem", "amlogic,meson-gxbb-scp-shmem"; |
| reg = <0x47000 0x400>; |
| }; |
| |
| cpu_scp_hpri: scp-shmem@200 { |
| compatible = "amlogic,meson-gx-scp-shmem", "amlogic,meson-gxbb-scp-shmem"; |
| reg = <0x47400 0x400>; |
| }; |
| }; |
| |
| aobus: aobus@ff800000 { |
| compatible = "simple-bus"; |
| reg = <0x0 0xff800000 0x0 0x100000>; |
| #address-cells = <2>; |
| #size-cells = <2>; |
| ranges = <0x0 0x0 0x0 0xff800000 0x0 0x100000>; |
| |
| clkc_AO: clock-controller@0 { |
| compatible = "amlogic,g12a-aoclkc"; |
| reg = <0x0 0x0 0x0 0x320>; |
| #clock-cells = <1>; |
| }; |
| |
| uart_AO: serial@3000 { |
| compatible = "amlogic,meson-uart"; |
| reg = <0x0 0x3000 0x0 0x14>; |
| interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>; |
| clocks = <&xtal>; |
| status = "disabled"; |
| }; |
| |
| uart_AO_B: serial@4000 { |
| compatible = "amlogic,meson-uart"; |
| reg = <0x0 0x4000 0x0 0x14>; |
| interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>; |
| clocks = <&xtal>; |
| status = "disabled"; |
| }; |
| |
| i2c_AO: i2c@5000 { |
| compatible = "amlogic,meson-i2c"; |
| reg = <0x0 0x05000 0x0 0x20>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| clocks = <&clkc CLKID_AO_I2C>; |
| clock-names = "clk_i2c"; |
| status = "disabled"; |
| }; |
| |
| pwm_AO_ab: pwm@7000 { |
| compatible = "amlogic,g12a-ao-pwm"; |
| reg = <0x0 0x7000 0x0 0x20>; |
| #pwm-cells = <3>; |
| status = "disabled"; |
| }; |
| |
| pwm_AO_cd: pwm@2000 { |
| compatible = "amlogic,g12a-ao-pwm"; |
| reg = <0x0 0x2000 0x0 0x20>; |
| #pwm-cells = <3>; |
| status = "disabled"; |
| }; |
| |
| ir: ir@8040 { |
| compatible = "amlogic,meson-gx-ir", "amlogic,meson-gxbb-ir"; |
| reg = <0x0 0x8040 0x0 0x40>; |
| interrupts = <GIC_SPI 196 IRQ_TYPE_EDGE_RISING>; |
| status = "disabled"; |
| }; |
| }; |
| |
| periphs: periphs@ff634000 { |
| compatible = "simple-bus"; |
| reg = <0x0 0xff634000 0x0 0x2000>; |
| #address-cells = <2>; |
| #size-cells = <2>; |
| ranges = <0x0 0x0 0x0 0xff634000 0x0 0x2000>; |
| |
| hwrng: rng { |
| compatible = "amlogic,meson-rng"; |
| reg = <0x0 0x0 0x0 0x4>; |
| }; |
| }; |
| |
| hiubus: hiubus@ff63c000 { |
| compatible = "simple-bus"; |
| reg = <0x0 0xff63c000 0x0 0x2000>; |
| #address-cells = <2>; |
| #size-cells = <2>; |
| ranges = <0x0 0x0 0x0 0xff63c000 0x0 0x2000>; |
| |
| clkc: clock-controller@0 { |
| compatible = "amlogic,g12a-clkc"; |
| #clock-cells = <1>; |
| reg = <0x0 0x0 0x0 0x320>; |
| clocks = <&xtal>; |
| clock-names = "xtal"; |
| }; |
| |
| mailbox: mailbox@404 { |
| compatible = "amlogic,meson-gx-mhu", "amlogic,meson-gxbb-mhu"; |
| reg = <0 0x404 0 0x4c>; |
| interrupts = <0 208 IRQ_TYPE_EDGE_RISING>, |
| <0 209 IRQ_TYPE_EDGE_RISING>, |
| <0 210 IRQ_TYPE_EDGE_RISING>; |
| #mbox-cells = <1>; |
| }; |
| }; |
| |
| ethmac: ethernet@ff3f0000 { |
| compatible = "amlogic,g12a-eth-dwmac"; |
| phy_cntl1 = <0x41054147>; |
| pll_val = <0x9c0040a 0x927e0000 0xac5f49e5>; |
| analog_val = <0x20200000 0x0000c000 0x00000023>; |
| status = "disabled"; |
| }; |
| |
| saradc: adc@ff809000 { |
| compatible = "amlogic,meson-saradc"; |
| reg = <0x0 0xff809000 0x0 0x48>; |
| #io-channel-cells = <1>; |
| interrupts = <GIC_SPI 200 IRQ_TYPE_EDGE_RISING>; |
| status = "disabled"; |
| }; |
| |
| nand: nfc@ffe07800 { |
| compatible = "amlogic,meson-g12a-nfc"; |
| reg = <0x0 0xFFE07800 0x0 0x200>; |
| interrupts = <GIC_SPI 34 IRQ_TYPE_EDGE_RISING>; |
| status = "disabled"; |
| clk_reg = <0 0xFFE07000>; |
| }; |
| |
| apb: apb@ffe01000 { |
| compatible = "simple-bus"; |
| reg = <0x0 0xffe01000 0x0 0x7f000>; |
| #address-cells = <2>; |
| #size-cells = <2>; |
| ranges = <0x0 0x0 0x0 0xffe01000 0x0 0x7f000>; |
| |
| sd_emmc_a: mmc@2000 { |
| compatible = ""; |
| reg = <0x0 0x2000 0x0 0x800>; |
| interrupts = <GIC_SPI 189 IRQ_TYPE_EDGE_RISING>; |
| status = "disabled"; |
| }; |
| |
| sd_emmc_b: mmc@4000 { |
| compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc"; |
| reg = <0x0 0x4000 0x0 0x800>; |
| interrupts = <GIC_SPI 190 IRQ_TYPE_EDGE_RISING>; |
| status = "disabled"; |
| }; |
| |
| sd_emmc_c: mmc@6000 { |
| compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc"; |
| reg = <0x0 0x6000 0x0 0x800>; |
| interrupts = <GIC_SPI 191 IRQ_TYPE_EDGE_RISING>; |
| status = "disabled"; |
| }; |
| }; |
| |
| dwc3: dwc3@ff500000 { |
| compatible = "snps,dwc3","synopsys,xhci-dwc3"; |
| status = "disable"; |
| reg = <0x0 0xff500000 0x0 0x100000>; |
| phys = <&usb2_phy_v2>, <&usb3_phy_v2>; |
| phy-names = "usb2-phy", "usb3-phy"; |
| }; |
| |
| usb2_phy_v2: usb2phy@ffe09000 { |
| compatible = "amlogic, amlogic-new-usb2-v2"; |
| status = "disable"; |
| #address-cells = <2>; |
| #size-cells = <2>; |
| phy-version = <2>; |
| reg = <0x0 0xffe09000 0x0 0x80 |
| 0x0 0xffd01008 0x0 0x100 |
| 0x0 0xff636000 0x0 0x2000 |
| 0x0 0xff63a000 0x0 0x2000>; |
| #phy-cells = <0>; |
| }; |
| |
| usb3_phy_v2: usb3phy@ffe09080 { |
| compatible = "amlogic, amlogic-new-usb3-v2"; |
| status = "disable"; |
| #address-cells = <2>; |
| #size-cells = <2>; |
| phy-version = <3>; |
| reg = <0x0 0xffe09080 0x0 0x20>; |
| phy-reg = <0xff646000>; |
| phy-reg-size = <0x2000>; |
| usb2-phy-reg = <0xffe09000>; |
| usb2-phy-reg-size = <0x80>; |
| #phy-cells = <0>; |
| }; |
| |
| }; |
| }; |
