| /* | |
| * (C) Copyright 2007-2008 | |
| * Stelian Pop <stelian@popies.net> | |
| * Lead Tech Design <www.leadtechdesign.com> | |
| * | |
| * Configuation settings for the AT91SAM9RLEK board. | |
| * | |
| * SPDX-License-Identifier: GPL-2.0+ | |
| */ | |
| #ifndef __CONFIG_H | |
| #define __CONFIG_H | |
| #include <asm/hardware.h> | |
| #define CONFIG_SYS_TEXT_BASE 0x21F00000 | |
| /* ARM asynchronous clock */ | |
| #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ | |
| #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* main clock xtal */ | |
| #define CONFIG_AT91SAM9RLEK 1 /* It's an AT91SAM9RLEK Board */ | |
| #define CONFIG_ARCH_CPU_INIT | |
| #define CONFIG_SKIP_LOWLEVEL_INIT | |
| #define CONFIG_BOARD_EARLY_INIT_F | |
| #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ | |
| #define CONFIG_SETUP_MEMORY_TAGS 1 | |
| #define CONFIG_INITRD_TAG 1 | |
| #define CONFIG_DISPLAY_CPUINFO | |
| #define CONFIG_CMD_BOOTZ | |
| #define CONFIG_OF_LIBFDT | |
| #define CONFIG_ATMEL_LEGACY | |
| #define CONFIG_AT91_GPIO 1 | |
| #define CONFIG_AT91_GPIO_PULLUP 1 | |
| /* | |
| * Hardware drivers | |
| */ | |
| /* serial console */ | |
| #define CONFIG_ATMEL_USART | |
| #define CONFIG_USART_BASE ATMEL_BASE_DBGU | |
| #define CONFIG_USART_ID ATMEL_ID_SYS | |
| #define CONFIG_BAUDRATE 115200 | |
| /* LCD */ | |
| #define CONFIG_LCD 1 | |
| #define LCD_BPP LCD_COLOR8 | |
| #define CONFIG_LCD_LOGO 1 | |
| #undef LCD_TEST_PATTERN | |
| #define CONFIG_LCD_INFO 1 | |
| #define CONFIG_LCD_INFO_BELOW_LOGO 1 | |
| #define CONFIG_SYS_WHITE_ON_BLACK 1 | |
| #define CONFIG_ATMEL_LCD 1 | |
| #define CONFIG_ATMEL_LCD_RGB565 1 | |
| /* Let board_init_f handle the framebuffer allocation */ | |
| #undef CONFIG_FB_ADDR | |
| #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 | |
| /* LED */ | |
| #define CONFIG_AT91_LED | |
| #define CONFIG_RED_LED AT91_PIN_PD14 /* this is the power led */ | |
| #define CONFIG_GREEN_LED AT91_PIN_PD15 /* this is the user1 led */ | |
| #define CONFIG_YELLOW_LED AT91_PIN_PD16 /* this is the user2 led */ | |
| #define CONFIG_BOOTDELAY 3 | |
| /* | |
| * Command line configuration. | |
| */ | |
| #include <config_cmd_default.h> | |
| #undef CONFIG_CMD_BDI | |
| #undef CONFIG_CMD_FPGA | |
| #undef CONFIG_CMD_IMI | |
| #undef CONFIG_CMD_IMLS | |
| #undef CONFIG_CMD_LOADS | |
| #undef CONFIG_CMD_NET | |
| #undef CONFIG_CMD_NFS | |
| #undef CONFIG_CMD_SOURCE | |
| #undef CONFIG_CMD_USB | |
| #define CONFIG_CMD_NAND 1 | |
| /* SDRAM */ | |
| #define CONFIG_NR_DRAM_BANKS 1 | |
| #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 | |
| #define CONFIG_SYS_SDRAM_SIZE 0x04000000 | |
| #define CONFIG_SYS_INIT_SP_ADDR \ | |
| (ATMEL_BASE_SRAM + 0x1000 - GENERATED_GBL_DATA_SIZE) | |
| /* DataFlash */ | |
| #define CONFIG_ATMEL_DATAFLASH_SPI | |
| #define CONFIG_HAS_DATAFLASH 1 | |
| #define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ) | |
| #define CONFIG_SYS_MAX_DATAFLASH_BANKS 1 | |
| #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ | |
| #define AT91_SPI_CLK 15000000 | |
| #define DATAFLASH_TCSS (0x1a << 16) | |
| #define DATAFLASH_TCHS (0x1 << 24) | |
| /* NOR flash - not present */ | |
| #define CONFIG_SYS_NO_FLASH 1 | |
| /* NAND flash */ | |
| #ifdef CONFIG_CMD_NAND | |
| #define CONFIG_NAND_ATMEL | |
| #define CONFIG_SYS_MAX_NAND_DEVICE 1 | |
| #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 | |
| #define CONFIG_SYS_NAND_DBW_8 1 | |
| /* our ALE is AD21 */ | |
| #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) | |
| /* our CLE is AD22 */ | |
| #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) | |
| #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PB6 | |
| #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD17 | |
| #endif | |
| /* Ethernet - not present */ | |
| /* USB - not supported */ | |
| #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ | |
| #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE | |
| #define CONFIG_SYS_MEMTEST_END 0x23e00000 | |
| #ifdef CONFIG_SYS_USE_DATAFLASH | |
| /* bootstrap + u-boot + env + linux in dataflash on CS0 */ | |
| #define CONFIG_ENV_IS_IN_DATAFLASH 1 | |
| #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400) | |
| #define CONFIG_ENV_OFFSET 0x4200 | |
| #define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET) | |
| #define CONFIG_ENV_SIZE 0x4200 | |
| #define CONFIG_BOOTCOMMAND "cp.b 0xC0084000 0x22000000 0x210000; bootm" | |
| #define CONFIG_BOOTARGS "console=ttyS0,115200 " \ | |
| "root=/dev/mtdblock0 " \ | |
| "mtdparts=atmel_nand:-(root) "\ | |
| "rw rootfstype=jffs2" | |
| #else /* CONFIG_SYS_USE_NANDFLASH */ | |
| /* bootstrap + u-boot + env + linux in nandflash */ | |
| #define CONFIG_ENV_IS_IN_NAND 1 | |
| #define CONFIG_ENV_OFFSET 0x60000 | |
| #define CONFIG_ENV_OFFSET_REDUND 0x80000 | |
| #define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */ | |
| #define CONFIG_BOOTCOMMAND "nand read 0x22000000 0xA0000 0x200000; bootm" | |
| #define CONFIG_BOOTARGS "console=ttyS0,115200 " \ | |
| "root=/dev/mtdblock5 " \ | |
| "mtdparts=atmel_nand:128k(bootstrap)ro,256k(uboot)ro,128k(env1)ro,128k(env2)ro,2M(linux),-(root) " \ | |
| "rw rootfstype=jffs2" | |
| #endif | |
| #define CONFIG_SYS_PROMPT "U-Boot> " | |
| #define CONFIG_SYS_CBSIZE 256 | |
| #define CONFIG_SYS_MAXARGS 16 | |
| #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) | |
| #define CONFIG_SYS_LONGHELP 1 | |
| #define CONFIG_CMDLINE_EDITING 1 | |
| #define CONFIG_AUTO_COMPLETE | |
| /* | |
| * Size of malloc() pool | |
| */ | |
| #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000) | |
| #endif |