| /* | |
| * Copyright (C) 2009 Texas Instruments Incorporated | |
| * | |
| * SPDX-License-Identifier: GPL-2.0+ | |
| */ | |
| #ifndef __CONFIG_H | |
| #define __CONFIG_H | |
| #define DAVINCI_DM355LEOPARD | |
| #define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is a 3rd stage loader */ | |
| #define CONFIG_SYS_NO_FLASH /* that is, no *NOR* flash */ | |
| #define CONFIG_SYS_CONSOLE_INFO_QUIET | |
| /* SoC Configuration */ | |
| #define CONFIG_ARM926EJS /* arm926ejs CPU */ | |
| #define CONFIG_SYS_TIMERBASE 0x01c21400 /* use timer 0 */ | |
| #define CONFIG_SYS_HZ_CLOCK 24000000 /* timer0 freq */ | |
| #define CONFIG_SOC_DM355 /* DM355 based board */ | |
| /* Memory Info */ | |
| #define CONFIG_NR_DRAM_BANKS 1 | |
| #define PHYS_SDRAM_1 0x80000000 | |
| #define PHYS_SDRAM_1_SIZE (128 << 20) /* 128 MiB */ | |
| /* Serial Driver info: UART0 for console */ | |
| #define CONFIG_SYS_NS16550 | |
| #define CONFIG_SYS_NS16550_SERIAL | |
| #define CONFIG_SYS_NS16550_REG_SIZE -4 | |
| #define CONFIG_SYS_NS16550_COM1 0x01c20000 | |
| #define CONFIG_SYS_NS16550_CLK CONFIG_SYS_HZ_CLOCK | |
| #define CONFIG_CONS_INDEX 1 | |
| #define CONFIG_BAUDRATE 115200 | |
| /* Ethernet: external DM9000 */ | |
| #define CONFIG_DRIVER_DM9000 1 | |
| #define CONFIG_DM9000_BASE 0x04000000 | |
| #define DM9000_IO CONFIG_DM9000_BASE | |
| #define DM9000_DATA (CONFIG_DM9000_BASE + 16) | |
| /* I2C */ | |
| #define CONFIG_HARD_I2C | |
| #define CONFIG_DRIVER_DAVINCI_I2C | |
| #define CONFIG_SYS_I2C_SPEED 400000 | |
| #define CONFIG_SYS_I2C_SLAVE 0x10 | |
| /* NAND */ | |
| #define CONFIG_NAND_DAVINCI | |
| #define CONFIG_SYS_NAND_CS 2 | |
| #define CONFIG_SYS_NAND_USE_FLASH_BBT | |
| #define CONFIG_SYS_NAND_HW_ECC | |
| #define CONFIG_SYS_NAND_BASE_LIST { 0x02000000, } | |
| #define CONFIG_SYS_MAX_NAND_DEVICE 1 | |
| /* U-Boot command configuration */ | |
| #include <config_cmd_default.h> | |
| #undef CONFIG_CMD_BDI | |
| #undef CONFIG_CMD_FLASH | |
| #undef CONFIG_CMD_FPGA | |
| #undef CONFIG_CMD_SETGETDCR | |
| #define CONFIG_CMD_ASKENV | |
| #define CONFIG_CMD_DHCP | |
| #define CONFIG_CMD_I2C | |
| #define CONFIG_CMD_PING | |
| #define CONFIG_CMD_SAVES | |
| #ifdef CONFIG_CMD_BDI | |
| #define CONFIG_CLOCKS | |
| #endif | |
| #ifdef CONFIG_NAND_DAVINCI | |
| #define CONFIG_CMD_MTDPARTS | |
| #define CONFIG_MTD_PARTITIONS | |
| #define CONFIG_MTD_DEVICE | |
| #define CONFIG_CMD_NAND | |
| #define CONFIG_CMD_UBI | |
| #define CONFIG_RBTREE | |
| #endif | |
| #define CONFIG_CRC32_VERIFY | |
| #define CONFIG_MX_CYCLIC | |
| /* U-Boot general configuration */ | |
| #define CONFIG_BOOTFILE "uImage" /* Boot file name */ | |
| #define CONFIG_SYS_PROMPT "DM355 LEOPARD # " | |
| #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ | |
| #define CONFIG_SYS_PBSIZE /* Print buffer size */ \ | |
| (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) | |
| #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ | |
| #define CONFIG_SYS_HUSH_PARSER | |
| #define CONFIG_SYS_LONGHELP | |
| #ifdef CONFIG_NAND_DAVINCI | |
| #define CONFIG_ENV_SIZE (256 << 10) /* 256 KiB */ | |
| #define CONFIG_ENV_IS_IN_NAND | |
| #define CONFIG_ENV_OFFSET 0x3C0000 | |
| #undef CONFIG_ENV_IS_IN_FLASH | |
| #define CONFIG_ENV_OVERWRITE | |
| #endif | |
| #define CONFIG_BOOTDELAY 3 | |
| #define CONFIG_BOOTCOMMAND "dhcp;bootm" | |
| #define CONFIG_BOOTARGS \ | |
| "console=ttyS0,115200n8 " \ | |
| "root=/dev/mmcblk0p1 rootwait rootfstype=ext3 ro" | |
| #define CONFIG_CMDLINE_EDITING | |
| #define CONFIG_VERSION_VARIABLE | |
| #define CONFIG_TIMESTAMP | |
| #define CONFIG_NET_RETRY_COUNT 10 | |
| /* U-Boot memory configuration */ | |
| #define CONFIG_SYS_MALLOC_LEN (1 << 20) /* 1 MiB */ | |
| #define CONFIG_SYS_MEMTEST_START 0x87000000 /* physical address */ | |
| #define CONFIG_SYS_MEMTEST_END 0x88000000 /* test 16MB RAM */ | |
| /* Linux interfacing */ | |
| #define CONFIG_CMDLINE_TAG | |
| #define CONFIG_SETUP_MEMORY_TAGS | |
| #define CONFIG_SYS_BARGSIZE 1024 /* bootarg Size */ | |
| #define CONFIG_SYS_LOAD_ADDR 0x80700000 /* kernel address */ | |
| #define MTDIDS_DEFAULT "nand0=davinci_nand.0" | |
| #ifdef CONFIG_SYS_NAND_LARGEPAGE | |
| #define PART_BOOT "2m(bootloader)ro," | |
| #else | |
| /* Assume 16K erase blocks; allow a few bad ones. */ | |
| #define PART_BOOT "512k(bootloader)ro," | |
| #endif | |
| #define PART_KERNEL "4m(kernel)," /* kernel + initramfs */ | |
| #define PART_REST "-(filesystem)" | |
| #define MTDPARTS_DEFAULT \ | |
| "mtdparts=davinci_nand.0:" PART_BOOT PART_KERNEL PART_REST | |
| #define CONFIG_MAX_RAM_BANK_SIZE (256 << 20) /* 256 MB */ | |
| #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 | |
| #define CONFIG_SYS_INIT_SP_ADDR \ | |
| (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE) | |
| #endif /* __CONFIG_H */ |