| /* |
| * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions are met: |
| * |
| * Redistributions of source code must retain the above copyright notice, this |
| * list of conditions and the following disclaimer. |
| * |
| * Redistributions in binary form must reproduce the above copyright notice, |
| * this list of conditions and the following disclaimer in the documentation |
| * and/or other materials provided with the distribution. |
| * |
| * Neither the name of ARM nor the names of its contributors may be used |
| * to endorse or promote products derived from this software without specific |
| * prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE |
| * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
| * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
| * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| * POSSIBILITY OF SUCH DAMAGE. |
| */ |
| |
| .globl bl21_entrypoint |
| .globl zeromem16 |
| |
| .func |
| bl21_entrypoint: |
| //stp x0, x1, x2, x3, x4, x5, x6, x7, lr, [sp] |
| //stp x0, x30, [sp] |
| /* --------------------------------------------- |
| * Zero out NOBITS sections. There are 2 of them: |
| * - the .bss section; |
| * - the coherent memory section. |
| * --------------------------------------------- |
| */ |
| ldr x0, =__BSS_START__ |
| ldr x1, =__BSS_SIZE__ |
| |
| add x2, x0, x1 |
| /* zero 16 bytes at a time */ |
| z_loop16: |
| sub x3, x2, x0 |
| cmp x3, #16 |
| b.lt z_loop1 |
| stp xzr, xzr, [x0], #16 |
| b z_loop16 |
| /* zero byte per byte */ |
| z_loop1: |
| cmp x0, x2 |
| b.eq z_end |
| strb wzr, [x0], #1 |
| b z_loop1 |
| z_end: |
| |
| /* --------------------------------------------- |
| * Jump to main function. |
| * --------------------------------------------- |
| */ |
| b bl21_main |
| .endfunc |
| |
| #if 0 |
| /* ----------------------------------------------------------------------- |
| * void zeromem16(void *mem, unsigned int length); |
| * |
| * Initialise a memory region to 0. |
| * The memory address must be 16-byte aligned. |
| * ----------------------------------------------------------------------- |
| */ |
| func zeromem16 |
| add x2, x0, x1 |
| /* zero 16 bytes at a time */ |
| z_loop16: |
| sub x3, x2, x0 |
| cmp x3, #16 |
| b.lt z_loop1 |
| stp xzr, xzr, [x0], #16 |
| b z_loop16 |
| /* zero byte per byte */ |
| z_loop1: |
| cmp x0, x2 |
| b.eq z_end |
| strb wzr, [x0], #1 |
| b z_loop1 |
| z_end: ret |
| #endif |
