| /* |
| * driver/display/lcd/aml_lcd_phy_config.h |
| * |
| * This program is free software; you can redistribute it and/or modify |
| * it under the terms of the GNU General Public License as published by |
| * the Free Software Foundation; either version 2 of the named License, |
| * or any later version. |
| * |
| * This program is distributed in the hope that it will be useful, |
| * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| * GNU General Public License for more details. |
| * |
| */ |
| |
| #ifndef _AML_LCD_PHY_CONFIG_H |
| #define _AML_LCD_PHY_CONFIG_H |
| |
| /* -------------------------- */ |
| /* lvsd phy parameters define */ |
| /* -------------------------- */ |
| #define LVDS_PHY_CNTL1_G9TV 0x606cca80 |
| #define LVDS_PHY_CNTL2_G9TV 0x0000006c |
| #define LVDS_PHY_CNTL3_G9TV 0x00000800 |
| |
| #define LVDS_PHY_CNTL1_TXHD 0x6c60ca80 |
| #define LVDS_PHY_CNTL2_TXHD 0x00000070 |
| #define LVDS_PHY_CNTL3_TXHD 0x03ff0c00 |
| /* -------------------------- */ |
| |
| /* -------------------------- */ |
| /* vbyone phy parameters define */ |
| /* -------------------------- */ |
| #define VX1_PHY_CNTL1_G9TV 0x6e0ec900 |
| #define VX1_PHY_CNTL1_G9TV_PULLUP 0x6e0f4d00 |
| #define VX1_PHY_CNTL2_G9TV 0x0000007c |
| #define VX1_PHY_CNTL3_G9TV 0x00ff0800 |
| /* -------------------------- */ |
| |
| /* -------------------------- */ |
| /* minilvds phy parameters define */ |
| /* -------------------------- */ |
| #define MLVDS_PHY_CNTL1_TXHD 0x6c60ca80 |
| #define MLVDS_PHY_CNTL2_TXHD 0x00000070 |
| #define MLVDS_PHY_CNTL3_TXHD 0x03ff0c00 |
| /* -------------------------- */ |
| |
| /* ******** MIPI_DSI_PHY ******** */ |
| /* bit[15:11] */ |
| #define MIPI_PHY_LANE_BIT 11 |
| #define MIPI_PHY_LANE_WIDTH 5 |
| |
| /* MIPI-DSI */ |
| #define DSI_LANE_0 (1 << 4) |
| #define DSI_LANE_1 (1 << 3) |
| #define DSI_LANE_CLK (1 << 2) |
| #define DSI_LANE_2 (1 << 1) |
| #define DSI_LANE_3 (1 << 0) |
| #define DSI_LANE_COUNT_1 (DSI_LANE_CLK | DSI_LANE_0) |
| #define DSI_LANE_COUNT_2 (DSI_LANE_CLK | DSI_LANE_0 | DSI_LANE_1) |
| #define DSI_LANE_COUNT_3 (DSI_LANE_CLK | DSI_LANE_0 |\ |
| DSI_LANE_1 | DSI_LANE_2) |
| #define DSI_LANE_COUNT_4 (DSI_LANE_CLK | DSI_LANE_0 |\ |
| DSI_LANE_1 | DSI_LANE_2 | DSI_LANE_3) |
| |
| static unsigned int lvds_vx1_p2p_phy_preem_tl1[] = { |
| 0x06020602, |
| 0x26022602, |
| 0x46024602, |
| 0x66026602, |
| 0x86028602, |
| 0xa602a602, |
| 0xf602f602, |
| }; |
| |
| static unsigned int p2p_low_common_phy_preem_tl1[] = { |
| 0x070b070b, |
| 0x170b170b, |
| 0x370b370b, |
| 0x770b770b, |
| 0xf70bf70b, |
| 0xff0bff0b, |
| }; |
| |
| #endif |
| |