| /* SPDX-License-Identifier: GPL-2.0+ */ |
| /* |
| * Copyright (C) 2016 samtec automotive software & electronics gmbh |
| * |
| * Configuration settings for the Samtec VIN|ING 2000 board. |
| */ |
| |
| #ifndef __CONFIG_H |
| #define __CONFIG_H |
| |
| #include "mx6_common.h" |
| |
| #ifdef CONFIG_SPL |
| #include "imx6_spl.h" |
| #endif |
| |
| /* Size of malloc() pool */ |
| #define CONFIG_SYS_MALLOC_LEN (3 * SZ_1M) |
| |
| #define CONFIG_MXC_UART |
| #define CONFIG_MXC_UART_BASE UART1_BASE |
| |
| #define BOOT_TARGET_DEVICES(func) \ |
| func(MMC, mmc, 0) \ |
| func(MMC, mmc, 1) \ |
| func(USB, usb, 0) \ |
| func(PXE, pxe, na) \ |
| func(DHCP, dhcp, na) |
| #include <config_distro_bootcmd.h> |
| |
| /* Miscellaneous configurable options */ |
| #define CONFIG_SYS_MEMTEST_START 0x80000000 |
| #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x10000) |
| |
| /* Physical Memory Map */ |
| #define CONFIG_NR_DRAM_BANKS 1 |
| #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR |
| |
| #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM |
| #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR |
| #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE |
| |
| #define CONFIG_SYS_INIT_SP_OFFSET \ |
| (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) |
| #define CONFIG_SYS_INIT_SP_ADDR \ |
| (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) |
| |
| /* MMC Configuration */ |
| #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC4_BASE_ADDR |
| |
| /* I2C Configs */ |
| #define CONFIG_SYS_I2C |
| #define CONFIG_SYS_I2C_MXC |
| #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ |
| #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ |
| #define CONFIG_SYS_I2C_SPEED 100000 |
| |
| /* PMIC */ |
| #define CONFIG_POWER |
| #define CONFIG_POWER_I2C |
| #define CONFIG_POWER_PFUZE100 |
| #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 |
| |
| /* Network */ |
| #define CONFIG_FEC_MXC |
| #define CONFIG_MII |
| |
| #define IMX_FEC_BASE ENET_BASE_ADDR |
| #define CONFIG_FEC_MXC_PHYADDR 0x0 |
| |
| #define CONFIG_FEC_XCV_TYPE RMII |
| #define CONFIG_ETHPRIME "FEC" |
| |
| #define CONFIG_PHY_ATHEROS |
| |
| #ifdef CONFIG_CMD_USB |
| #define CONFIG_EHCI_HCD_INIT_AFTER_RESET |
| #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) |
| #define CONFIG_MXC_USB_FLAGS 0 |
| #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 |
| #endif |
| |
| #ifdef CONFIG_CMD_PCI |
| #define CONFIG_PCI_SCAN_SHOW |
| #define CONFIG_PCIE_IMX |
| #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(4, 6) |
| #endif |
| |
| #define CONFIG_IMX_THERMAL |
| |
| #define CONFIG_PWM_IMX |
| #define CONFIG_IMX6_PWM_PER_CLK 66000000 |
| |
| #define CONFIG_ENV_OFFSET (8 * SZ_64K) |
| #define CONFIG_ENV_SIZE SZ_8K |
| #define CONFIG_ENV_OFFSET_REDUND (9 * SZ_64K) |
| #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE |
| |
| #ifdef CONFIG_ENV_IS_IN_MMC |
| #define CONFIG_SUPPORT_EMMC_BOOT |
| #define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC4 eMMC */ |
| /* 0=user, 1=boot0, 2=boot1, * 4..7=general0..3. */ |
| #define CONFIG_SYS_MMC_ENV_PART 1 /* boot0 */ |
| #endif |
| |
| #endif /* __CONFIG_H */ |