| // SPDX-License-Identifier: GPL-2.0+ | |
| /* | |
| * Xilinx CSE QSPI Quad Stacked DTS | |
| * | |
| * Copyright (C) 2015 - 2017 Xilinx, Inc. | |
| */ | |
| #include "zynq-cse-qspi.dtsi" | |
| / { | |
| model = "Zynq CSE QSPI STACKED Board"; | |
| }; | |
| &qspi { | |
| num-cs = <2>; | |
| }; | |
| &flash0 { | |
| reg = <0>, <1>; | |
| stacked-memories = /bits/ 64 <0x1000000 0x1000000>; /* 16MB */ | |
| spi-rx-bus-width = <4>; | |
| }; |